* emit-rtl.c (need_atomic_barrier_p): New function.
* emit-rtl.h (need_atomic_barrier_p): Declare it.
* config/alpha/alpha.c (alpha_{pre,post}_atomic_barrier): Use it.
* config/arm/arm.c (arm_{pre,post}_atomic_barrier): Use it.
* config/tilegx/tilegx.c (tile_{pre,post}_atomic_barrier): Use it.
* config/mips/mips.c (mips_{pre,post}_atomic_barrier_p): Remove.
(mips_process_sync_loop): Use generic version instead.
From-SVN: r188806
+2012-06-19 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * emit-rtl.c (need_atomic_barrier_p): New function.
+ * emit-rtl.h (need_atomic_barrier_p): Declare it.
+ * config/alpha/alpha.c (alpha_{pre,post}_atomic_barrier): Use it.
+ * config/arm/arm.c (arm_{pre,post}_atomic_barrier): Use it.
+ * config/tilegx/tilegx.c (tile_{pre,post}_atomic_barrier): Use it.
+ * config/mips/mips.c (mips_{pre,post}_atomic_barrier_p): Remove.
+ (mips_process_sync_loop): Use generic version instead.
+
2012-06-19 Maxim Kuvyrkov <maxim@codesourcery.com>
* config/mips/mips.c (mips_process_sync_loop): Emit cmp result only if
static void
alpha_pre_atomic_barrier (enum memmodel model)
{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_ACQUIRE:
- break;
- case MEMMODEL_RELEASE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- emit_insn (gen_memory_barrier ());
- break;
- default:
- gcc_unreachable ();
- }
+ if (need_atomic_barrier_p (model, true))
+ emit_insn (gen_memory_barrier ());
}
static void
alpha_post_atomic_barrier (enum memmodel model)
{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_RELEASE:
- break;
- case MEMMODEL_ACQUIRE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- emit_insn (gen_memory_barrier ());
- break;
- default:
- gcc_unreachable ();
- }
+ if (need_atomic_barrier_p (model, false))
+ emit_insn (gen_memory_barrier ());
}
/* A subroutine of the atomic operation splitters. Emit an insxl
static void
arm_pre_atomic_barrier (enum memmodel model)
{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_ACQUIRE:
- break;
- case MEMMODEL_RELEASE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- emit_insn (gen_memory_barrier ());
- break;
- default:
- gcc_unreachable ();
- }
+ if (need_atomic_barrier_p (model, true))
+ emit_insn (gen_memory_barrier ());
}
static void
arm_post_atomic_barrier (enum memmodel model)
{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_RELEASE:
- break;
- case MEMMODEL_ACQUIRE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- emit_insn (gen_memory_barrier ());
- break;
- default:
- gcc_unreachable ();
- }
+ if (need_atomic_barrier_p (model, false))
+ emit_insn (gen_memory_barrier ());
}
/* Emit the load-exclusive and store-exclusive instructions. */
gcc_unreachable ();
}
-/* Subroutines of the mips_process_sync_loop.
- Emit barriers as needed for the memory MODEL. */
-
-static bool
-mips_emit_pre_atomic_barrier_p (enum memmodel model)
-{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_ACQUIRE:
- return false;
- case MEMMODEL_RELEASE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- return true;
- default:
- gcc_unreachable ();
- }
-}
-
-static bool
-mips_emit_post_atomic_barrier_p (enum memmodel model)
-{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_RELEASE:
- return false;
- case MEMMODEL_ACQUIRE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- return true;
- default:
- gcc_unreachable ();
- }
-}
-
/* OPERANDS are the operands to a sync loop instruction and INDEX is
the value of the one of the sync_* attributes. Return the operand
referred to by the attribute, or DEFAULT_VALUE if the insn doesn't
mips_multi_start ();
/* Output the release side of the memory barrier. */
- if (mips_emit_pre_atomic_barrier_p (model))
+ if (need_atomic_barrier_p (model, true))
{
if (required_oldval == 0 && TARGET_OCTEON)
{
mips_multi_add_insn ("li\t%0,1", cmp, NULL);
/* Output the acquire side of the memory barrier. */
- if (TARGET_SYNC_AFTER_SC && mips_emit_post_atomic_barrier_p (model))
+ if (TARGET_SYNC_AFTER_SC && need_atomic_barrier_p (model, false))
mips_multi_add_insn ("sync", NULL);
/* Output the exit label, if needed. */
void
tilegx_pre_atomic_barrier (enum memmodel model)
{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_ACQUIRE:
- break;
- case MEMMODEL_RELEASE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- emit_insn (gen_memory_barrier ());
- break;
- default:
- gcc_unreachable ();
- }
+ if (need_atomic_barrier_p (model, true))
+ emit_insn (gen_memory_barrier ());
}
void
tilegx_post_atomic_barrier (enum memmodel model)
{
- switch (model)
- {
- case MEMMODEL_RELAXED:
- case MEMMODEL_CONSUME:
- case MEMMODEL_RELEASE:
- break;
- case MEMMODEL_ACQUIRE:
- case MEMMODEL_ACQ_REL:
- case MEMMODEL_SEQ_CST:
- emit_insn (gen_memory_barrier ());
- break;
- default:
- gcc_unreachable ();
- }
+ if (need_atomic_barrier_p (model, false))
+ emit_insn (gen_memory_barrier ());
}
return locator_scope (loc1) == locator_scope (loc2);
}
\f
+
+/* Return true if memory model MODEL requires a pre-operation (release-style)
+ barrier or a post-operation (acquire-style) barrier. While not universal,
+ this function matches behavior of several targets. */
+
+bool
+need_atomic_barrier_p (enum memmodel model, bool pre)
+{
+ switch (model)
+ {
+ case MEMMODEL_RELAXED:
+ case MEMMODEL_CONSUME:
+ return false;
+ case MEMMODEL_RELEASE:
+ return pre;
+ case MEMMODEL_ACQUIRE:
+ return !pre;
+ case MEMMODEL_ACQ_REL:
+ case MEMMODEL_SEQ_CST:
+ return true;
+ default:
+ gcc_unreachable ();
+ }
+}
+\f
#include "gt-emit-rtl.h"
extern void adjust_reg_mode (rtx, enum machine_mode);
extern int mem_expr_equal_p (const_tree, const_tree);
+extern bool need_atomic_barrier_p (enum memmodel, bool);
+
/* Return the first insn of the current sequence or current function. */
static inline rtx