The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause...

The recently added gcc.target/aarch64/advsimd-intrinsics/vrnd*.c tests cause
failures due to accidentally running on non-ARMv8 hardware - the target check
arm_v8_neon_ok is correct for compilation tests but should be arm_v8_neon_hw
for execution tests.  Fix this and also change arm_v8_neon_hw to return
true for AArch64 so these tests are run on AArch64 too.

    gcc/testsuite/
	* gcc.target/aarch64/advsimd-intrinsics/vrnd.c
	(dg-require-effective-target): Use arm_v8_neon_hw.
	* gcc.target/aarch64/advsimd-intrinsics/vrnda.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndm.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndn.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndp.c
	(dg-require-effective-target): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndx.c
	(dg-require-effective-target): Likewise.
	* lib/target-supports.exp (check_runtime arm_v8_neon_hw_available):
	Add AArch64 check.

From-SVN: r237653

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7f2df1f..ffb1614 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,22 @@
 2016-06-21  Wilco Dijkstra  <wdijkstr@arm.com>
 
+       * gcc.target/aarch64/advsimd-intrinsics/vrnd.c
+       (dg-require-effective-target): Use arm_v8_neon_hw.
+       * gcc.target/aarch64/advsimd-intrinsics/vrnda.c
+       (dg-require-effective-target): Likewise.
+       * gcc.target/aarch64/advsimd-intrinsics/vrndm.c
+       (dg-require-effective-target): Likewise.
+       * gcc.target/aarch64/advsimd-intrinsics/vrndn.c
+       (dg-require-effective-target): Likewise.
+       * gcc.target/aarch64/advsimd-intrinsics/vrndp.c
+       (dg-require-effective-target): Likewise.
+       * gcc.target/aarch64/advsimd-intrinsics/vrndx.c
+       (dg-require-effective-target): Likewise.
+       * lib/target-supports.exp (check_runtime arm_v8_neon_hw_available):
+       Add AArch64 check.
+
+2016-06-21  Wilco Dijkstra  <wdijkstr@arm.com>
+
        * gcc.dg/tree-ssa/attr-hotcold-2.c (scan-tree-dump-times):
        Set to 3 so test passes.
 

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
index 5f492d4..d97a3a2 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c
index 816fd28..ff2bdc0 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c
index 029880c..eae9f61 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c
index 571243c..c6c707d 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c
index ff4771c..e94eb6b 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c
index ff2357b..0d2a63e 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-require-effective-target arm_v8_neon_hw } */
 /* { dg-add-options arm_v8_neon } */
 
 #include <arm_neon.h>

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 9876bb5..2a8feb8 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3417,11 +3417,17 @@ proc check_effective_target_arm_v8_neon_hw { } {
        int
        main (void)
        {
-         float32x2_t a;
+         float32x2_t a = { 1.0f, 2.0f };
+         #ifdef __ARM_ARCH_ISA_A64
+         asm ("frinta %0.2s, %1.2s"
+             : "=w" (a)
+             : "w" (a));
+         #else
          asm ("vrinta.f32 %P0, %P1"
               : "=w" (a)
               : "0" (a));
-         return 0;
+         #endif
+         return a[0] == 2.0f;
        }
     } [add_options_for_arm_v8_neon ""]]
 }