anv: disable preemption on 3DPRIMITIVE on gfx12
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Tue, 5 Apr 2022 12:35:57 +0000 (15:35 +0300)
committerMarge Bot <emma+marge@anholt.net>
Wed, 6 Apr 2022 12:51:15 +0000 (12:51 +0000)
To workaround a push constant corruption issue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5963
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5662
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15753>

src/intel/genxml/gen12.xml
src/intel/vulkan/genX_state.c

index c250da0..2d708b5 100644 (file)
       <value name="Mid-cmdbuffer Preemption" value="0"/>
       <value name="Object Level Preemption" value="1"/>
     </field>
+    <field name="Disable Preemption and High Priority Pausing due to 3DPRIMITIVE Command" start="10" end="10" type="bool"/>
     <field name="Replay Mode Mask" start="16" end="16" type="bool"/>
+    <field name="Disable Preemption and High Priority Pausing due to 3DPRIMITIVE Command Mask" start="26" end="26" type="bool"/>
   </register>
 
   <register name="CS_DEBUG_MODE2" length="1" num="0x20d8">
index c3d8592..25fa9db 100644 (file)
@@ -316,6 +316,11 @@ init_render_queue_state(struct anv_queue *queue)
    anv_batch_write_reg(&batch, GENX(CS_CHICKEN1), cc1) {
       cc1.ReplayMode = MidcmdbufferPreemption;
       cc1.ReplayModeMask = true;
+
+#if GFX_VERx10 == 120
+      cc1.DisablePreemptionandHighPriorityPausingdueto3DPRIMITIVECommand = true;
+      cc1.DisablePreemptionandHighPriorityPausingdueto3DPRIMITIVECommandMask = true;
+#endif
    }
 
 #if GFX_VERx10 < 125