#include <linux/pci.h>
#include <linux/io.h>
#include <linux/debugfs.h>
+#include <linux/pm_runtime.h>
#define HSU_DMA_BUF_SIZE 2048
container_of(port, struct uart_hsu_port, port);
unsigned long flags;
+ pm_runtime_get_sync(up->dev);
+
/*
* Clear the FIFO buffers and disable them.
* (they will be reenabled in set_termios())
UART_FCR_CLEAR_RCVR |
UART_FCR_CLEAR_XMIT);
serial_out(up, UART_FCR, 0);
+
+ pm_runtime_put(up->dev);
}
static void
#define serial_hsu_resume NULL
#endif
+#ifdef CONFIG_PM_RUNTIME
+static int serial_hsu_runtime_idle(struct device *dev)
+{
+ int err;
+
+ err = pm_schedule_suspend(dev, 500);
+ if (err)
+ return -EBUSY;
+
+ return 0;
+}
+
+static int serial_hsu_runtime_suspend(struct device *dev)
+{
+ return 0;
+}
+
+static int serial_hsu_runtime_resume(struct device *dev)
+{
+ return 0;
+}
+#else
+#define serial_hsu_runtime_idle NULL
+#define serial_hsu_runtime_suspend NULL
+#define serial_hsu_runtime_resume NULL
+#endif
+
+static const struct dev_pm_ops serial_hsu_pm_ops = {
+ .runtime_suspend = serial_hsu_runtime_suspend,
+ .runtime_resume = serial_hsu_runtime_resume,
+ .runtime_idle = serial_hsu_runtime_idle,
+};
+
/* temp global pointer before we settle down on using one or four PCI dev */
static struct hsu_port *phsu;
pci_set_drvdata(pdev, uport);
}
+ pm_runtime_put_noidle(&pdev->dev);
+ pm_runtime_allow(&pdev->dev);
+
return 0;
err_disable:
if (!priv)
return;
+ pm_runtime_forbid(&pdev->dev);
+ pm_runtime_get_noresume(&pdev->dev);
+
/* For port 0/1/2, priv is the address of uart_hsu_port */
if (pdev->device != 0x081E) {
up = priv;
.remove = __devexit_p(serial_hsu_remove),
.suspend = serial_hsu_suspend,
.resume = serial_hsu_resume,
+ .driver = {
+ .pm = &serial_hsu_pm_ops,
+ },
};
static int __init hsu_pci_init(void)