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One definition of back_to_back_c0_hazard too much.
author
Ralf Baechle
<ralf@linux-mips.org>
Wed, 2 Mar 2005 19:18:46 +0000
(19:18 +0000)
committer
Ralf Baechle
<ralf@linux-mips.org>
Sat, 29 Oct 2005 18:30:50 +0000
(19:30 +0100)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
include/asm-mips/hazards.h
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diff --git
a/include/asm-mips/hazards.h
b/include/asm-mips/hazards.h
index
d6e88cf
..
181f08d
100644
(file)
--- a/
include/asm-mips/hazards.h
+++ b/
include/asm-mips/hazards.h
@@
-107,6
+107,7
@@
__asm__(
" .endm \n\t");
#ifdef CONFIG_CPU_RM9000
+
/*
* RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
* use of the JTLB for instructions should not occur for 4 cpu cycles and use
@@
-144,12
+145,6
@@
__asm__(
"nop; nop; nop; nop; nop; nop;\n\t" \
".set reorder\n\t")
-#define back_to_back_c0_hazard() \
- __asm__ __volatile__( \
- " .set noreorder \n" \
- " nop; nop; nop \n" \
- " .set reorder \n")
-
#endif
/*