"DomTreeUpdater.cpp",
"DominanceFrontier.cpp",
"EHPersonalities.cpp",
+ "FunctionPropertiesAnalysis.cpp",
"GlobalsModRef.cpp",
"GuardUtils.cpp",
"HeatUtils.cpp",
"IndirectCallPromotionAnalysis.cpp",
"InlineAdvisor.cpp",
"InlineCost.cpp",
- "InlineFeaturesAnalysis.cpp",
"InlineSizeEstimatorAnalysis.cpp",
"InstCount.cpp",
"InstructionPrecedenceTracking.cpp",
td_file = "AMDGPU.td"
}
+tablegen("InstCombineTables") {
+ visibility = [ ":LLVMAMDGPUCodeGen" ]
+ args = [ "-gen-searchable-tables" ]
+}
+
tablegen("R600GenCallingConv") {
visibility = [ ":LLVMAMDGPUCodeGen" ]
args = [ "-gen-callingconv" ]
":AMDGPUGenPreLegalizeGICombiner",
":AMDGPUGenRegBankGICombiner",
":AMDGPUGenRegisterBank",
+ ":InstCombineTables",
":R600GenCallingConv",
":R600GenDAGISel",
":R600GenDFAPacketizer",
import("//llvm/utils/TableGen/tablegen.gni")
-tablegen("InstCombineTables") {
- visibility = [ ":InstCombine" ]
- args = [ "-gen-searchable-tables" ]
-}
-
static_library("InstCombine") {
output_name = "LLVMInstCombine"
deps = [
- ":InstCombineTables",
"//llvm/lib/Analysis",
"//llvm/lib/IR",
"//llvm/lib/Support",