drm/i915/gvt: emulate SKL_FUSE_STATUS and LCPLL_CTL for virtual monitor detection
authorWeinan Li <weinan.z.li@intel.com>
Fri, 17 Mar 2017 01:38:57 +0000 (09:38 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 29 Mar 2017 07:28:51 +0000 (15:28 +0800)
Initialize the correct vreg for virtual monitor.
Set PG0/1/2 distribution and fuse download done in SKL_FUSE_STATUS.
Set PLL_ENABLE and PLL_LOCK in LCPLL_CTL.
Guest may need to check these registers for display monitor detection
on Skylake platforms.

Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/display.c

index 5419ae6..79939f9 100644 (file)
@@ -172,9 +172,20 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                        SDE_PORTC_HOTPLUG_CPT |
                        SDE_PORTD_HOTPLUG_CPT);
 
-       if (IS_SKYLAKE(dev_priv))
+       if (IS_SKYLAKE(dev_priv)) {
                vgpu_vreg(vgpu, SDEISR) &= ~(SDE_PORTA_HOTPLUG_SPT |
                                SDE_PORTE_HOTPLUG_SPT);
+               vgpu_vreg(vgpu, SKL_FUSE_STATUS) |=
+                               SKL_FUSE_DOWNLOAD_STATUS |
+                               SKL_FUSE_PG0_DIST_STATUS |
+                               SKL_FUSE_PG1_DIST_STATUS |
+                               SKL_FUSE_PG2_DIST_STATUS;
+               vgpu_vreg(vgpu, LCPLL1_CTL) |=
+                               LCPLL_PLL_ENABLE |
+                               LCPLL_PLL_LOCK;
+               vgpu_vreg(vgpu, LCPLL2_CTL) |= LCPLL_PLL_ENABLE;
+
+       }
 
        if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
                vgpu_vreg(vgpu, SDEISR) |= SDE_PORTB_HOTPLUG_CPT;