(do_t_hlt): New function.
(do_t_bkpt): Use do_t_bkpt_hlt1.
(insns): Add HLT.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add HLT.
(thumb_opcodes): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+ * config/tc-arm.c (do_t_bkpt_hlt1): New function.
+ (do_t_hlt): New function.
+ (do_t_bkpt): Use do_t_bkpt_hlt1.
+ (insns): Add HLT.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
* config/tc-arm.c (insns): Add DCPS instruction.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
inst.reloc.pc_rel = 1;
}
+/* Actually do the work for Thumb state bkpt and hlt. The only difference
+ between the two is the maximum immediate allowed - which is passed in
+ RANGE. */
static void
-do_t_bkpt (void)
+do_t_bkpt_hlt1 (int range)
{
constraint (inst.cond != COND_ALWAYS,
_("instruction is always unconditional"));
if (inst.operands[0].present)
{
- constraint (inst.operands[0].imm > 255,
+ constraint (inst.operands[0].imm > range,
_("immediate value out of range"));
inst.instruction |= inst.operands[0].imm;
- set_it_insn_type (NEUTRAL_IT_INSN);
}
+
+ set_it_insn_type (NEUTRAL_IT_INSN);
+}
+
+static void
+do_t_hlt (void)
+{
+ do_t_bkpt_hlt1 (63);
+}
+
+static void
+do_t_bkpt (void)
+{
+ do_t_bkpt_hlt1 (255);
}
static void
#define THUMB_VARIANT & arm_ext_v8
tCE("sevl", 320f005, _sevl, 0, (), noargs, t_hint),
+ TUE("hlt", 1000070, ba80, 1, (oIffffb), bkpt, t_hlt),
+ /* ARMv8 T32 only. */
#undef ARM_VARIANT
#define ARM_VARIANT NULL
TUF("dcps1", 0, f78f8001, 0, (), noargs, noargs),
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+ * gas/arm/armv8-a-bad.l: Update for HLT.
+ * gas/arm/armv8-a-bad.s: Likewise.
+ * gas/arm/armv8-a.d: Likewise.
+ * gas/arm/armv8-a.s: Likewise.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
* gas/arm/armv8-a.d: Update.
* gas/arm/armv8-a.s: Likewise.
.*:14: Warning: This coprocessor register access is deprecated in ARMv8
.*:17: Warning: setend use is deprecated for ARMv8
.*:20: Warning: setend use is deprecated for ARMv8
+.*:24: Error: immediate value out of range -- `hlt 0x10000'
+.*:25: Error: instruction cannot be conditional -- `hltne 0x1'
+.*:29: Error: immediate value out of range -- `hlt 64'
+.*:31: Warning: it blocks containing 16-bit Thumb intsructions of the following class are deprecated in ARMv8: Miscellaneous 16-bit instructions
+.*:31: Error: instruction is always unconditional -- `hltne 0'
.thumb
setend le
+
+ // HLT A32
+ .arm
+ hlt 0x10000
+ hltne 0x1
+
+ // HLT T32
+ .thumb
+ hlt 64
+ it ne
+ hltne 0
Disassembly of section .text:
0[0-9a-f]+ <[^>]+> e320f005 sevl
+0[0-9a-f]+ <[^>]+> e1000070 hlt 0x0000
+0[0-9a-f]+ <[^>]+> e100007f hlt 0x000f
+0[0-9a-f]+ <[^>]+> e10fff70 hlt 0xfff0
0[0-9a-f]+ <[^>]+> bf50 sevl
0[0-9a-f]+ <[^>]+> bf50 sevl
0[0-9a-f]+ <[^>]+> f3af 8005 sevl.w
0[0-9a-f]+ <[^>]+> f78f 8001 dcps1
0[0-9a-f]+ <[^>]+> f78f 8002 dcps2
0[0-9a-f]+ <[^>]+> f78f 8003 dcps3
+0[0-9a-f]+ <[^>]+> ba80 hlt 0x0000
+0[0-9a-f]+ <[^>]+> babf hlt 0x003f
.arm
foo:
sevl
+ hlt 0x0
+ hlt 0xf
+ hlt 0xfff0
.thumb
.thumb_func
dcps1
dcps2
dcps3
+ hlt 0
+ hlt 63
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+ * arm-dis.c (arm_opcodes): Add HLT.
+ (thumb_opcodes): Likewise.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
* arm-dis.c (thumb32_opcodes): Add DCPS instruction.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
/* V8 instructions. */
{ARM_EXT_V8, 0x0320f005, 0x0fffffff, "sevl"},
+ {ARM_EXT_V8, 0xe1000070, 0xfff000f0, "hlt\t0x%16-19X%12-15X%8-11X%0-3X"},
+
/* Virtualization Extension instructions. */
{ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
/* ARM V8 instructions. */
{ARM_EXT_V8, 0xbf50, 0xffff, "sevl%c"},
+ {ARM_EXT_V8, 0xba80, 0xffc0, "hlt\t%0-5x"},
/* ARM V6K no-argument instructions. */
{ARM_EXT_V6K, 0xbf00, 0xffff, "nop%c"},