ARM: dts: imx6dl-plym2m: configure ethernet reference clock parent

On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6dl-plym2m.dts b/arch/arm/boot/dts/imx6dl-plym2m.dts
index 522660c912a0d5e07e334086219b2119b379809d..e3c10483f33bdc96c80d2de1255b7a7e749cb260 100644 (file)
--- a/arch/arm/boot/dts/imx6dl-plym2m.dts
+++ b/arch/arm/boot/dts/imx6dl-plym2m.dts
@@ -84,6 +84,7 @@
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <50000000>;
+               clock-output-names = "enet_ref_pad";
        };
 
        reg_3v3: regulator-3v3 {
@@ -173,6 +174,13 @@
        status = "okay";
 };
 
+&clks {
+       clocks = <&clk50m_phy>;
+       clock-names = "enet_ref_pad";
+       assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
+       assigned-clock-parents = <&clk50m_phy>;
+};
+
 &ecspi1 {
        cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
        pinctrl-names = "default";
@@ -254,10 +262,6 @@
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet>;
        phy-mode = "rmii";
-       clocks = <&clks IMX6QDL_CLK_ENET>,
-                <&clks IMX6QDL_CLK_ENET>,
-                <&clk50m_phy>;
-       clock-names = "ipg", "ahb", "ptp";
        phy-handle = <&rgmii_phy>;
        status = "okay";