Merge branch 'omap-for-v5.6/ti-sysc-omap45-rng' into omap-for-v5.6/ti-sysc-drop-pdata

diff --cc arch/arm/boot/dts/omap4-l4.dtsi
Simple merge

diff --cc arch/arm/boot/dts/omap4.dtsi
Simple merge

diff --cc arch/arm/boot/dts/omap5-l4.dtsi
Simple merge

diff --cc arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 722c641,f85ce74..b7c51ea
--- 1/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
--- 2/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@@ -653,33 -777,40 +653,7 @@@ static struct omap_hwmod omap44xx_dss_v
        .opt_clks_cnt   = ARRAY_SIZE(dss_venc_opt_clks),
  };
  
- /* sha0 HIB2 (the 'P' (public) device) */
- static struct omap_hwmod_class_sysconfig omap44xx_sha0_sysc = {
-       .rev_offs       = 0x100,
-       .sysc_offs      = 0x110,
-       .syss_offs      = 0x114,
-       .sysc_flags     = SYSS_HAS_RESET_STATUS,
- };
- 
- static struct omap_hwmod_class omap44xx_sha0_hwmod_class = {
-       .name           = "sham",
-       .sysc           = &omap44xx_sha0_sysc,
- };
- 
- static struct omap_hwmod omap44xx_sha0_hwmod = {
-       .name           = "sham",
-       .class          = &omap44xx_sha0_hwmod_class,
-       .clkdm_name     = "l4_secure_clkdm",
-       .main_clk       = "l3_div_ck",
-       .prcm           = {
-               .omap4 = {
-                       .clkctrl_offs = OMAP4_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET,
-                       .context_offs = OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET,
-                       .modulemode   = MODULEMODE_SWCTRL,
-               },
-       },
- };
  
 -/*
 - * 'elm' class
 - * bch error location module
 - */
 -
 -static struct omap_hwmod_class_sysconfig omap44xx_elm_sysc = {
 -      .rev_offs       = 0x0000,
 -      .sysc_offs      = 0x0010,
 -      .syss_offs      = 0x0014,
 -      .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
 -                         SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
 -                         SYSS_HAS_RESET_STATUS),
 -      .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
 -      .sysc_fields    = &omap_hwmod_sysc_type1,
 -};
 -
 -static struct omap_hwmod_class omap44xx_elm_hwmod_class = {
 -      .name   = "elm",
 -      .sysc   = &omap44xx_elm_sysc,
 -};
 -
 -/* elm */
 -static struct omap_hwmod omap44xx_elm_hwmod = {
 -      .name           = "elm",
 -      .class          = &omap44xx_elm_hwmod_class,
 -      .clkdm_name     = "l4_per_clkdm",
 -      .prcm = {
 -              .omap4 = {
 -                      .clkctrl_offs = OMAP4_CM_L4PER_ELM_CLKCTRL_OFFSET,
 -                      .context_offs = OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET,
 -              },
 -      },
 -};
  
  /*
   * 'emif' class
@@@ -728,103 -859,50 +702,6 @@@ static struct omap_hwmod omap44xx_emif2
  };
  
  /*
-     Crypto modules AES0/1 belong to:
-       PD_L4_PER power domain
-       CD_L4_SEC clock domain
-       On the L3, the AES modules are mapped to
-       L3_CLK2: Peripherals and multimedia sub clock domain
- */
- static struct omap_hwmod_class_sysconfig omap44xx_aes_sysc = {
-       .rev_offs       = 0x80,
-       .sysc_offs      = 0x84,
-       .syss_offs      = 0x88,
-       .sysc_flags     = SYSS_HAS_RESET_STATUS,
- };
- 
- static struct omap_hwmod_class omap44xx_aes_hwmod_class = {
-       .name           = "aes",
-       .sysc           = &omap44xx_aes_sysc,
- };
- 
- static struct omap_hwmod omap44xx_aes1_hwmod = {
-       .name           = "aes1",
-       .class          = &omap44xx_aes_hwmod_class,
-       .clkdm_name     = "l4_secure_clkdm",
-       .main_clk       = "l3_div_ck",
-       .prcm           = {
-               .omap4  = {
-                       .context_offs   = OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET,
-                       .clkctrl_offs   = OMAP4_CM_L4SEC_AES1_CLKCTRL_OFFSET,
-                       .modulemode     = MODULEMODE_SWCTRL,
-               },
-       },
- };
- 
- static struct omap_hwmod_ocp_if omap44xx_l3_main_2__aes1 = {
-       .master         = &omap44xx_l4_per_hwmod,
-       .slave          = &omap44xx_aes1_hwmod,
-       .clk            = "l3_div_ck",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
- };
- 
- static struct omap_hwmod omap44xx_aes2_hwmod = {
-       .name           = "aes2",
-       .class          = &omap44xx_aes_hwmod_class,
-       .clkdm_name     = "l4_secure_clkdm",
-       .main_clk       = "l3_div_ck",
-       .prcm           = {
-               .omap4  = {
-                       .context_offs   = OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET,
-                       .clkctrl_offs   = OMAP4_CM_L4SEC_AES2_CLKCTRL_OFFSET,
-                       .modulemode     = MODULEMODE_SWCTRL,
-               },
-       },
- };
- 
- static struct omap_hwmod_ocp_if omap44xx_l3_main_2__aes2 = {
-       .master         = &omap44xx_l4_per_hwmod,
-       .slave          = &omap44xx_aes2_hwmod,
-       .clk            = "l3_div_ck",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
- };
- 
- /*
-  * 'des' class for DES3DES module
 - * 'fdif' class
 - * face detection hw accelerator module
-- */
- static struct omap_hwmod_class_sysconfig omap44xx_des_sysc = {
-       .rev_offs       = 0x30,
-       .sysc_offs      = 0x34,
-       .syss_offs      = 0x38,
-       .sysc_flags     = SYSS_HAS_RESET_STATUS,
 -
 -static struct omap_hwmod_class_sysconfig omap44xx_fdif_sysc = {
 -      .rev_offs       = 0x0000,
 -      .sysc_offs      = 0x0010,
 -      /*
 -       * FDIF needs 100 OCP clk cycles delay after a softreset before
 -       * accessing sysconfig again.
 -       * The lowest frequency at the moment for L3 bus is 100 MHz, so
 -       * 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
 -       *
 -       * TODO: Indicate errata when available.
 -       */
 -      .srst_udelay    = 2,
 -      .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
 -                         SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
 -      .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
 -                         MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
 -      .sysc_fields    = &omap_hwmod_sysc_type2,
--};
--
- static struct omap_hwmod_class omap44xx_des_hwmod_class = {
-       .name           = "des",
-       .sysc           = &omap44xx_des_sysc,
 -static struct omap_hwmod_class omap44xx_fdif_hwmod_class = {
 -      .name   = "fdif",
 -      .sysc   = &omap44xx_fdif_sysc,
--};
--
- static struct omap_hwmod omap44xx_des_hwmod = {
-       .name           = "des",
-       .class          = &omap44xx_des_hwmod_class,
-       .clkdm_name     = "l4_secure_clkdm",
-       .main_clk       = "l3_div_ck",
-       .prcm           = {
-               .omap4  = {
-                       .context_offs   = OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET,
-                       .clkctrl_offs   = OMAP4_CM_L4SEC_DES3DES_CLKCTRL_OFFSET,
-                       .modulemode     = MODULEMODE_SWCTRL,
 -/* fdif */
 -static struct omap_hwmod omap44xx_fdif_hwmod = {
 -      .name           = "fdif",
 -      .class          = &omap44xx_fdif_hwmod_class,
 -      .clkdm_name     = "iss_clkdm",
 -      .main_clk       = "fdif_fck",
 -      .prcm = {
 -              .omap4 = {
 -                      .clkctrl_offs = OMAP4_CM_CAM_FDIF_CLKCTRL_OFFSET,
 -                      .context_offs = OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET,
 -                      .modulemode   = MODULEMODE_SWCTRL,
--              },
--      },
- };
- 
- static struct omap_hwmod_ocp_if omap44xx_l3_main_2__des = {
-       .master         = &omap44xx_l3_main_2_hwmod,
-       .slave          = &omap44xx_des_hwmod,
-       .clk            = "l3_div_ck",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
--};
--
--/*
   * 'gpmc' class
   * general purpose memory controller
   */
@@@ -1735,14 -2482,22 +1612,6 @@@ static struct omap_hwmod_ocp_if omap44x
        .user           = OCP_USER_MPU,
  };
  
- /* l3_main_2 -> sham */
- static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sha0 = {
-       .master         = &omap44xx_l3_main_2_hwmod,
-       .slave          = &omap44xx_sha0_hwmod,
-       .clk            = "l3_div_ck",
 -/* l4_per -> elm */
 -static struct omap_hwmod_ocp_if omap44xx_l4_per__elm = {
 -      .master         = &omap44xx_l4_per_hwmod,
 -      .slave          = &omap44xx_elm_hwmod,
 -      .clk            = "l4_div_ck",
 -      .user           = OCP_USER_MPU | OCP_USER_SDMA,
 -};
 -
 -/* l4_cfg -> fdif */
 -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__fdif = {
 -      .master         = &omap44xx_l4_cfg_hwmod,
 -      .slave          = &omap44xx_fdif_hwmod,
 -      .clk            = "l4_div_ck",
--      .user           = OCP_USER_MPU | OCP_USER_SDMA,
--};
--
  /* l3_main_2 -> gpmc */
  static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpmc = {
        .master         = &omap44xx_l3_main_2_hwmod,