tvin: vdin: tl1 improve vdin afbce function [1/1]
authorXuhua Zhang <xuhua.zhang@amlogic.com>
Fri, 16 Nov 2018 06:23:10 +0000 (14:23 +0800)
committerBo Yang <bo.yang@amlogic.com>
Tue, 27 Nov 2018 11:47:41 +0000 (03:47 -0800)
PD#172587

Problem:
vdin afbce can not work well

Solution:
change afbce work mode

Verify:
verify on tl1

Change-Id: I3e980c7488bd8a0eb6f043fd1fb2d2b2bc75140f
Signed-off-by: Xuhua Zhang <xuhua.zhang@amlogic.com>
drivers/amlogic/media/vin/tvin/vdin/vdin_afbce.c
drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c
drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c
drivers/amlogic/media/vin/tvin/vdin/vdin_drv.h

index eaa9d73..426cf72 100644 (file)
@@ -79,8 +79,6 @@ unsigned int vdin_afbce_cma_alloc(struct vdin_dev_s *devp)
        unsigned int afbce_mem_used;
        unsigned int frame_head_size;
        unsigned int mmu_used;
-       //unsigned long afbce_head_phy_addr;
-       //unsigned long afbce_table_phy_addr;
        unsigned long body_start_paddr;
 
        if (devp->rdma_enable)
@@ -283,10 +281,9 @@ unsigned int vdin_afbce_cma_alloc(struct vdin_dev_s *devp)
        /* 1 block = 32 * 4 pixle = 128 pixel */
        /* there is a header in one block, a header has 4 bytes */
        /* set fm_head_paddr start */
-       frame_head_size = roundup(devp->h_active * devp->v_active, 128);
+       frame_head_size = (int)roundup(devp->h_active * devp->v_active, 128);
        /*h_active * v_active / 128 * 4 = frame_head_size*/
-       frame_head_size = devp->h_active * devp->v_active / 32;
-       frame_head_size = PAGE_ALIGN(frame_head_size);
+       frame_head_size = PAGE_ALIGN(frame_head_size / 32);
 
        devp->afbce_info->frame_head_size = frame_head_size;
 
@@ -533,18 +530,17 @@ void vdin_afbce_config(struct vdin_dev_s *devp)
                ((def_color_1 & 0xfff) << 0)    // def_color_u
                );
 
-       //cur_mmu_used += Rd(AFBCE_MMU_NUM); //4k addr have used in every frame;
-
        W_VCBUS_BIT(AFBCE_MMU_RMIF_CTRL4, devp->afbce_info->table_paddr, 0, 32);
        W_VCBUS_BIT(AFBCE_MMU_RMIF_SCOPE_X, cur_mmu_used, 0, 12);
 
+       W_VCBUS_BIT(AFBCE_ENABLE, 1, 12, 1); //set afbce pulse mode
        W_VCBUS_BIT(AFBCE_ENABLE, 1, 8, 1);//enable afbce
 }
 
 void vdin_afbce_maptable_init(struct vdin_dev_s *devp)
 {
        unsigned int i, j;
-       unsigned int *ptable = NULL;
+       unsigned long ptable = 0;
        unsigned int *vtable = NULL;
        unsigned int body;
        unsigned int size;
@@ -552,12 +548,13 @@ void vdin_afbce_maptable_init(struct vdin_dev_s *devp)
        size = roundup(devp->afbce_info->frame_body_size, 4096);
 
        for (i = 0; i < devp->vfmem_max_cnt; i++) {
-               ptable = (unsigned int *)
-                       (devp->afbce_info->fm_table_paddr[i]&0xffffffff);
+               ptable = devp->afbce_info->fm_table_paddr[i];
                if (devp->cma_config_flag == 0x101)
-                       vtable = codec_mm_phys_to_virt((unsigned long)ptable);
+                       vtable = codec_mm_phys_to_virt(ptable);
                else if (devp->cma_config_flag == 0)
-                       vtable = phys_to_virt((unsigned long)ptable);
+                       vtable = phys_to_virt(ptable);
+               else
+                       vtable = phys_to_virt(ptable);
 
                body = devp->afbce_info->fm_body_paddr[i]&0xffffffff;
                for (j = 0; j < size; j += 4096) {
@@ -571,20 +568,27 @@ void vdin_afbce_set_next_frame(struct vdin_dev_s *devp,
        unsigned int rdma_enable, struct vf_entry *vfe)
 {
        unsigned char i;
-       unsigned int cur_mmu_used;
 
        i = vfe->af_num;
-       cur_mmu_used = devp->afbce_info->fm_table_paddr[i] / 4;
+       vfe->vf.compHeadAddr = devp->afbce_info->fm_head_paddr[i];
+       vfe->vf.compBodyAddr = devp->afbce_info->fm_body_paddr[i];
 
 #ifdef CONFIG_AML_RDMA
-       if (rdma_enable)
-               rdma_write_reg_bits(devp->rdma_handle,
-                       AFBCE_HEAD_BADDR, devp->afbce_info->fm_head_paddr[i]);
-               rdma_write_reg(devp->rdma_handle,
-                       AFBCE_MMU_RMIF_SCOPE_X, cur_mmu_used, 0, 12);
-       else
+       if (rdma_enable) {
+               rdma_write_reg(devp->rdma_handle, AFBCE_HEAD_BADDR,
+                       devp->afbce_info->fm_head_paddr[i]);
+               rdma_write_reg_bits(devp->rdma_handle, AFBCE_MMU_RMIF_CTRL4,
+                       devp->afbce_info->fm_table_paddr[i], 0, 32);
+               rdma_write_reg_bits(devp->rdma_handle, AFBCE_ENABLE, 1, 0, 1);
+
+               //W_VCBUS_BIT(AFBCE_ENABLE, 1, 0, 1); //enable pulse mode
+       } else
 #endif
-       afbce_wr(AFBCE_HEAD_BADDR, devp->afbce_info->fm_head_paddr[i]);
-       W_VCBUS_BIT(AFBCE_MMU_RMIF_SCOPE_X, cur_mmu_used, 0, 12);
+       {
+               afbce_wr(AFBCE_HEAD_BADDR, devp->afbce_info->fm_head_paddr[i]);
+               W_VCBUS_BIT(AFBCE_MMU_RMIF_CTRL4,
+                       devp->afbce_info->fm_table_paddr[i], 0, 32);
+               W_VCBUS_BIT(AFBCE_ENABLE, 1, 0, 1); //enable pulse mode
+       }
 }
 
index 97d58d3..c4d66ae 100644 (file)
@@ -4035,6 +4035,12 @@ u32 vdin_get_curr_field_type(struct vdin_dev_s *devp)
                type &= (~VIDTYPE_VIU_SINGLE_PLANE);
 
        }
+
+       if (devp->afbce_mode == 1) {
+               type |= VIDTYPE_COMPRESS;
+               type |= VIDTYPE_SCATTER;
+       }
+
        return type;
 }
 
index 74993dc..7b52574 100644 (file)
@@ -321,17 +321,24 @@ static void vdin_vf_init(struct vdin_dev_s *devp)
                /*if output fmt is nv21 or nv12 ,
                 * use the two continuous canvas for one field
                 */
-               if ((devp->prop.dest_cfmt == TVIN_NV12) ||
-                       (devp->prop.dest_cfmt == TVIN_NV21)) {
-                       chromaid =
+               if (devp->afbce_mode == 0) {
+                       if ((devp->prop.dest_cfmt == TVIN_NV12) ||
+                               (devp->prop.dest_cfmt == TVIN_NV21)) {
+                               chromaid =
                                (vdin_canvas_ids[index][(vf->index<<1)+1])<<8;
-                       addr =
-                               vdin_canvas_ids[index][vf->index<<1] |
-                               chromaid;
-               } else
-                       addr = vdin_canvas_ids[index][vf->index];
-
-               vf->canvas0Addr = vf->canvas1Addr = addr;
+                               addr =
+                                       vdin_canvas_ids[index][vf->index<<1] |
+                                       chromaid;
+                       } else
+                               addr = vdin_canvas_ids[index][vf->index];
+
+                       vf->canvas0Addr = vf->canvas1Addr = addr;
+               } else if (devp->afbce_mode == 1) {
+                       vf->compHeadAddr = devp->afbce_info->fm_head_paddr[i];
+                       vf->compBodyAddr = devp->afbce_info->fm_body_paddr[i];
+                       vf->compWidth  = devp->h_active;
+                       vf->compHeight = devp->v_active;
+               }
 
                /* set source type & mode */
                vdin_set_source_type(devp, vf);
@@ -1538,19 +1545,20 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
        }
        /* prepare for next input data */
        next_wr_vfe = provider_vf_get(devp->vfp);
-       if (devp->afbce_mode == 0)
+       if (devp->afbce_mode == 0) {
                vdin_set_canvas_id(devp, (devp->flags&VDIN_FLAG_RDMA_ENABLE),
                        (next_wr_vfe->vf.canvas0Addr&0xff));
-       else if (devp->afbce_mode == 1)
+
+               /* prepare for chroma canvas*/
+               if ((devp->prop.dest_cfmt == TVIN_NV12) ||
+                       (devp->prop.dest_cfmt == TVIN_NV21))
+                       vdin_set_chma_canvas_id(devp,
+                               (devp->flags&VDIN_FLAG_RDMA_ENABLE),
+                               (next_wr_vfe->vf.canvas0Addr>>8)&0xff);
+       } else if (devp->afbce_mode == 1) {
                vdin_afbce_set_next_frame(devp,
                        (devp->flags&VDIN_FLAG_RDMA_ENABLE), next_wr_vfe);
-
-       /* prepare for chroma canvas*/
-       if ((devp->prop.dest_cfmt == TVIN_NV12) ||
-               (devp->prop.dest_cfmt == TVIN_NV21))
-               vdin_set_chma_canvas_id(devp,
-                       (devp->flags&VDIN_FLAG_RDMA_ENABLE),
-                       (next_wr_vfe->vf.canvas0Addr>>8)&0xff);
+       }
 
        devp->curr_wr_vfe = next_wr_vfe;
        /* debug for video latency */
@@ -1735,18 +1743,19 @@ irqreturn_t vdin_v4l2_isr(int irq, void *dev_id)
 
        /* prepare for next input data */
        next_wr_vfe = provider_vf_get(devp->vfp);
-       if (devp->afbce_mode == 0)
+       if (devp->afbce_mode == 0) {
                vdin_set_canvas_id(devp, (devp->flags&VDIN_FLAG_RDMA_ENABLE),
                        (next_wr_vfe->vf.canvas0Addr&0xff));
-       else if (devp->afbce_mode == 1)
-               vdin_afbce_set_next_frame(devp,
-                       (devp->flags&VDIN_FLAG_RDMA_ENABLE), next_wr_vfe);
 
-       if ((devp->prop.dest_cfmt == TVIN_NV12) ||
+               if ((devp->prop.dest_cfmt == TVIN_NV12) ||
                        (devp->prop.dest_cfmt == TVIN_NV21))
-               vdin_set_chma_canvas_id(devp,
-                               (devp->flags&VDIN_FLAG_RDMA_ENABLE),
-                               (next_wr_vfe->vf.canvas0Addr>>8)&0xff);
+                       vdin_set_chma_canvas_id(devp,
+                       (devp->flags&VDIN_FLAG_RDMA_ENABLE),
+                       (next_wr_vfe->vf.canvas0Addr>>8)&0xff);
+       } else if (devp->afbce_mode == 1) {
+               vdin_afbce_set_next_frame(devp,
+                       (devp->flags&VDIN_FLAG_RDMA_ENABLE), next_wr_vfe);
+       }
 
        devp->curr_wr_vfe = next_wr_vfe;
        vf_notify_receiver(devp->name, VFRAME_EVENT_PROVIDER_VFRAME_READY,
index 43e719e..331b81c 100644 (file)
@@ -37,7 +37,7 @@
 #include <linux/amlogic/media/vfm/vframe_provider.h>
 #include <linux/amlogic/media/frame_provider/tvin/tvin_v4l2.h>
 #ifdef CONFIG_AML_RDMA
-#include <linux/amlogic/rdma/rdma_mgr.h>
+#include <linux/amlogic/media/rdma/rdma_mgr.h>
 #endif
 
 /* Local Headers */