batch->ptr = batch->map;
batch->atomic = 0;
batch->last_bo = batch->buffer;
+ batch->enable_slm = 0;
}
LOCAL void
if (!is_locked)
intel_driver_lock_hardware(batch->intel);
- dri_bo_exec(batch->buffer, used, 0, 0, 0);
+ int flag = I915_EXEC_RENDER;
+ if(batch->enable_slm) {
+ /* use the hard code here temp, must change to
+ * I915_EXEC_ENABLE_SLM when it drm accept the patch */
+ flag |= (1<<13);
+ }
+ drm_intel_gem_bo_context_exec(batch->buffer, batch->intel->ctx, used, flag);
+
if (!is_locked)
intel_driver_unlock_hardware(batch->intel);
{
if (driver == NULL)
return;
+
if (driver->bufmgr)
drm_intel_bufmgr_destroy(driver->bufmgr);
cl_free(driver);
drm_intel_bufmgr_gem_enable_reuse(driver->bufmgr);
}
+static void
+intel_driver_context_init(intel_driver_t *driver)
+{
+ driver->ctx = drm_intel_gem_context_create(driver->bufmgr);
+ assert(driver->ctx);
+}
+
+static void
+intel_driver_context_destroy(intel_driver_t *driver)
+{
+ if(driver->ctx)
+ drm_intel_gem_context_destroy(driver->ctx);
+ driver->ctx = NULL;
+}
+
static void
intel_driver_init(intel_driver_t *driver, int dev_fd)
{
intel_driver_get_param(driver, I915_PARAM_CHIPSET_ID, &driver->device_id);
assert(res);
intel_driver_memman_init(driver);
+ intel_driver_context_init(driver);
#if EMULATE_GEN
driver->gen_ver = EMULATE_GEN;
assert(driver != NULL);
intel_driver_open(driver, NULL);
intel_device_id = driver->device_id;
+ intel_driver_context_destroy(driver);
intel_driver_close(driver);
intel_driver_terminate(driver);
intel_driver_delete(driver);
{
if (driver == NULL)
return;
+ intel_driver_context_destroy(driver);
intel_driver_close(driver);
intel_driver_terminate(driver);
intel_driver_delete(driver);
typedef struct intel_gpgpu intel_gpgpu_t;
+typedef void (intel_gpgpu_set_L3_t)(intel_gpgpu_t *gpgpu, uint32_t use_slm);
+intel_gpgpu_set_L3_t *intel_gpgpu_set_L3 = NULL;
static void
intel_gpgpu_sync(void *buf)
}
static void
-intel_gpgpu_set_L3(intel_gpgpu_t *gpgpu, uint32_t use_slm)
+intel_gpgpu_set_L3_gen7(intel_gpgpu_t *gpgpu, uint32_t use_slm)
{
+ /* still set L3 in batch buffer for fulsim. */
BEGIN_BATCH(gpgpu->batch, 9);
OUT_BATCH(gpgpu->batch, CMD_LOAD_REGISTER_IMM | 1); /* length - 2 */
OUT_BATCH(gpgpu->batch, GEN7_L3_SQC_REG1_ADDRESS_OFFSET);
OUT_BATCH(gpgpu->batch, gpgpu_l3_config_reg2[12]);
else
OUT_BATCH(gpgpu->batch, gpgpu_l3_config_reg2[4]);
- ADVANCE_BATCH(gpgpu->batch);
+ ADVANCE_BATCH(gpgpu->batch);
+
+ //To set L3 in HSW, enable the flag I915_EXEC_ENABLE_SLM flag when exec
+ if(use_slm)
+ gpgpu->batch->enable_slm = 1;
+ intel_gpgpu_pipe_control(gpgpu);
+}
+
+static void
+intel_gpgpu_set_L3_gen75(intel_gpgpu_t *gpgpu, uint32_t use_slm)
+{
+ /* still set L3 in batch buffer for fulsim. */
+ BEGIN_BATCH(gpgpu->batch, 6);
+ OUT_BATCH(gpgpu->batch, CMD_LOAD_REGISTER_IMM | 1); /* length - 2 */
+ OUT_BATCH(gpgpu->batch, GEN7_L3_CNTL_REG2_ADDRESS_OFFSET);
+ if (use_slm)
+ OUT_BATCH(gpgpu->batch, gpgpu_l3_config_reg1[8]);
+ else
+ OUT_BATCH(gpgpu->batch, gpgpu_l3_config_reg1[4]);
+
+ OUT_BATCH(gpgpu->batch, CMD_LOAD_REGISTER_IMM | 1); /* length - 2 */
+ OUT_BATCH(gpgpu->batch, GEN7_L3_CNTL_REG3_ADDRESS_OFFSET);
+ if (use_slm)
+ OUT_BATCH(gpgpu->batch, gpgpu_l3_config_reg2[8]);
+ else
+ OUT_BATCH(gpgpu->batch, gpgpu_l3_config_reg2[4]);
+ ADVANCE_BATCH(gpgpu->batch);
+
+ //To set L3 in HSW, enable the flag I915_EXEC_ENABLE_SLM flag when exec
+ if(use_slm)
+ gpgpu->batch->enable_slm = 1;
intel_gpgpu_pipe_control(gpgpu);
}
{
intel_batchbuffer_start_atomic(gpgpu->batch, 256);
intel_gpgpu_pipe_control(gpgpu);
+ assert(intel_gpgpu_set_L3);
intel_gpgpu_set_L3(gpgpu, gpgpu->ker->use_slm);
intel_gpgpu_select_pipeline(gpgpu);
intel_gpgpu_set_base_address(gpgpu);
cl_gpgpu_ref_batch_buf = (cl_gpgpu_ref_batch_buf_cb *)intel_gpgpu_ref_batch_buf;
cl_gpgpu_unref_batch_buf = (cl_gpgpu_unref_batch_buf_cb *)intel_gpgpu_unref_batch_buf;
- if (IS_HASWELL(device_id))
+ if (IS_HASWELL(device_id)) {
cl_gpgpu_bind_image = (cl_gpgpu_bind_image_cb *) intel_gpgpu_bind_image_gen75;
- else if (IS_IVYBRIDGE(device_id))
+ intel_gpgpu_set_L3 = intel_gpgpu_set_L3_gen75;
+ }
+ else if (IS_IVYBRIDGE(device_id)) {
cl_gpgpu_bind_image = (cl_gpgpu_bind_image_cb *) intel_gpgpu_bind_image_gen7;
+ intel_gpgpu_set_L3 = intel_gpgpu_set_L3_gen7;
+ }
else
assert(0);
}