thunderx: Move mmu table into board file

The MMU range table can vary depending on things we may only find
out at runtime. While the very simple ThunderX variant does not
change, other boards will, so move the definition from a static
entry in a header file to the board file.

Signed-off-by: Alexander Graf <agraf@suse.de>

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 73628c96113614487c0247d0ce6f4f04e5d91487..55c6f2f259ec3f7a0bff339afc072a9484135948 100644 (file)
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -36,8 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 
 #ifdef CONFIG_SYS_FULL_VA
-static struct mm_region mem_map[] = CONFIG_SYS_MEM_MAP;
-
 static u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
 {
        u64 max_addr = 0;
@@ -46,7 +44,7 @@ static u64 get_tcr(int el, u64 *pips, u64 *pva_bits)
        int i;
 
        /* Find the largest address we need to support */
-       for (i = 0; i < ARRAY_SIZE(mem_map); i++)
+       for (i = 0; mem_map[i].size || mem_map[i].attrs; i++)
                max_addr = max(max_addr, mem_map[i].base + mem_map[i].size);
 
        /* Calculate the maximum physical (and thus virtual) address */
@@ -266,7 +264,7 @@ static int count_required_pts(u64 addr, int level, u64 maxaddr)
        int i;
        enum pte_type pte_type = PTE_INVAL;
 
-       for (i = 0; i < ARRAY_SIZE(mem_map); i++) {
+       for (i = 0; mem_map[i].size || mem_map[i].attrs; i++) {
                struct mm_region *map = &mem_map[i];
                u64 start = map->base;
                u64 end = start + map->size;
@@ -364,7 +362,7 @@ static void setup_pgtables(void)
        create_table();
 
        /* Now add all MMU table entries one after another to the table */
-       for (i = 0; i < ARRAY_SIZE(mem_map); i++)
+       for (i = 0; mem_map[i].size || mem_map[i].attrs; i++)
                add_map(&mem_map[i]);
 
        /* Create the same thing once more for our emergency page table */

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 1c490dcd1008d6242677213f6f6b7ac8d0895a58..06126c88d89bd6cc1bb4d7748938fcbba51cc5d8 100644 (file)
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -203,6 +203,8 @@ struct mm_region {
        u64 size;
        u64 attrs;
 };
+
+extern struct mm_region *mem_map;
 #endif
 
 #endif /* _ASM_ARMV8_MMU_H_ */

diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c
index b9267676dc65afc1e98d2297a0db1ac437c752fa..9131a385fd07965d0619740a3f5cf225229482c2 100644 (file)
--- a/board/cavium/thunderx/thunderx.c
+++ b/board/cavium/thunderx/thunderx.c
@@ -10,6 +10,7 @@
 #include <linux/compiler.h>
 
 #include <cavium/atf.h>
+#include <asm/armv8/mmu.h>
 
 #if !CONFIG_IS_ENABLED(OF_CONTROL)
 #include <dm/platdata.h>
@@ -42,6 +43,29 @@ U_BOOT_DEVICE(thunderx_serial1) = {
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static struct mm_region thunderx_mem_map[] = {
+       {
+               .base = 0x000000000000UL,
+               .size = 0x40000000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
+       }, {
+               .base = 0x800000000000UL,
+               .size = 0x40000000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE,
+       }, {
+               .base = 0x840000000000UL,
+               .size = 0x40000000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE,
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
+struct mm_region *mem_map = thunderx_mem_map;
+
 int board_init(void)
 {
        return 0;

diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index 20b25f7badb33c4e1e2e856df8e63108b9186c67..64e4616bfaa662e2abb1f5f19498e19174752f3a 100644 (file)
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -26,17 +26,6 @@
 
 #define CONFIG_SYS_LOWMEM_BASE         MEM_BASE
 
-#define CONFIG_SYS_MEM_MAP             {{0x000000000000UL, 0x40000000000UL, \
-                                         PTE_BLOCK_MEMTYPE(MT_NORMAL) |     \
-                                         PTE_BLOCK_NON_SHARE},      \
-                                        {0x800000000000UL, 0x40000000000UL, \
-                                         PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | \
-                                         PTE_BLOCK_NON_SHARE},      \
-                                        {0x840000000000UL, 0x40000000000UL, \
-                                         PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | \
-                                         PTE_BLOCK_NON_SHARE},      \
-                                       }
-
 #define CONFIG_SYS_MEM_MAP_SIZE                3
 
 #define CONFIG_SYS_VA_BITS             48