drm/amd/display: fix use_max_lb flag for 420 pixel formats

Right now the flag simply selects memory config 0 when flag is true
however 420 modes benefit more from memory config 3.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
index efa86d5..98ab4b7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
@@ -496,10 +496,13 @@ static enum lb_memory_config dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *d
        int vtaps_c = scl_data->taps.v_taps_c;
        int ceil_vratio = dc_fixpt_ceil(scl_data->ratios.vert);
        int ceil_vratio_c = dc_fixpt_ceil(scl_data->ratios.vert_c);
-       enum lb_memory_config mem_cfg = LB_MEMORY_CONFIG_0;
 
-       if (dpp->base.ctx->dc->debug.use_max_lb)
-               return mem_cfg;
+       if (dpp->base.ctx->dc->debug.use_max_lb) {
+               if (scl_data->format == PIXEL_FORMAT_420BPP8
+                               || scl_data->format == PIXEL_FORMAT_420BPP10)
+                       return LB_MEMORY_CONFIG_3;
+               return LB_MEMORY_CONFIG_0;
+       }
 
        dpp->base.caps->dscl_calc_lb_num_partitions(
                        scl_data, LB_MEMORY_CONFIG_1, &num_part_y, &num_part_c);