ARM: dts: Fix dm814x control base to properly initialize Ethernet PHY
authorTony Lindgren <tony@atomide.com>
Mon, 14 Sep 2015 14:07:28 +0000 (07:07 -0700)
committerTony Lindgren <tony@atomide.com>
Mon, 14 Sep 2015 19:12:15 +0000 (12:12 -0700)
Looks like I made a typo on the control base, all the 81xx
SoCs have it at 0x48140000 base. We've just gotten away with
the typo as the Ethernet phy was configured by the bootloader
on my test system and we're not yet using the pinctrl.

In addition to fixing the contol base, we need to also use the
right Ethernet phy flags to initialize it. And we are still
missing the PLL driver for dm814x and only relying on the
divider and mux clocks.

Fixes: f3d953ea3721 ("ARM: dts: Add minimal dm814x support")
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dm8148-evm.dts
arch/arm/boot/dts/dm8148-t410.dts
arch/arm/boot/dts/dm814x.dtsi

index 92bacd3..109fd47 100644 (file)
 
 &cpsw_emac0 {
        phy_id = <&davinci_mdio>, <0>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };
 
 &cpsw_emac1 {
        phy_id = <&davinci_mdio>, <1>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };
index 8c4bbc7..aecd7df 100644 (file)
 
 &cpsw_emac0 {
        phy_id = <&davinci_mdio>, <0>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };
 
 &cpsw_emac1 {
        phy_id = <&davinci_mdio>, <1>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };
index 972c9c9..7988b42 100644 (file)
                                ti,hwmods = "timer3";
                        };
 
-                       control: control@160000 {
+                       control: control@140000 {
                                compatible = "ti,dm814-scm", "simple-bus";
-                               reg = <0x160000 0x16d000>;
+                               reg = <0x140000 0x16d000>;
                                #address-cells = <1>;
                                #size-cells = <1>;
                                ranges = <0 0x160000 0x16d000>;
                                mac-address = [ 00 00 00 00 00 00 ];
                        };
 
-                       phy_sel: cpsw-phy-sel@0x48160650 {
+                       phy_sel: cpsw-phy-sel@48140650 {
                                compatible = "ti,am3352-cpsw-phy-sel";
-                               reg= <0x48160650 0x4>;
+                               reg= <0x48140650 0x4>;
                                reg-names = "gmii-sel";
                        };
                };