armv5te="default"
iwmmxt="default"
altivec="default"
+dcbzl="no"
mmi="default"
case "$cpu" in
i386|i486|i586|i686|i86pc|BePC)
die "C compiler test failed."
fi
+# check for assembler specific support
+
+if test $cpu = "powerpc"; then
+check_cc <<EOF && dcbzl=yes
+int main(void) {
+ register long zero = 0;
+ char data[1024];
+ asm volatile("dcbzl %0, %1" : : "b" (data), "r" (zero));
+return 0;
+}
+EOF
+fi
+
# check for SIMD availability
# AltiVec flags: The FSF version of GCC differs from the Apple version
fi
if test $cpu = "powerpc"; then
echo "AltiVec enabled $altivec"
+ echo "dcbzl available $dcbzl"
fi
echo "gprof enabled $gprof"
echo "zlib enabled $zlib"
echo "TARGET_MMI=yes" >> config.mak
echo "#define HAVE_MMI 1" >> $TMPH
fi
+
+if test "$dcbzl" = "yes" ; then
+ echo "#define HAVE_DCBZL 1" >> $TMPH
+else
+ echo "#undef HAVE_DCBZL" >> $TMPH
+fi
+
if test "$altivec" = "yes" ; then
echo "TARGET_ALTIVEC=yes" >> config.mak
echo "#define HAVE_ALTIVEC 1" >> $TMPH
/* same as above, when dcbzl clear a whole 128B cache line
i.e. the PPC970 aka G5 */
-#ifndef NO_DCBZL
+#ifdef HAVE_DCBZL
void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1);
}
#endif
-#ifndef NO_DCBZL
+#ifdef HAVE_DCBZL
/* check dcbz report how many bytes are set to 0 by dcbz */
/* update 24/06/2003 : replace dcbz by dcbzl to get
the intended effect (Apple "fixed" dcbz)
#ifndef _DSPUTIL_PPC_
#define _DSPUTIL_PPC_
-#ifdef CONFIG_DARWIN
-/* The Apple assembler shipped w/ gcc-3.3 knows about DCBZL, previous assemblers don't
- We assume here that the Darwin GCC is from Apple.... */
-#if (__GNUC__ * 100 + __GNUC_MINOR__ < 303)
-#define NO_DCBZL
-#endif
-#else /* CONFIG_DARWIN */
-/* I don't think any non-Apple assembler knows about DCBZL */
-#define NO_DCBZL
-#endif /* CONFIG_DARWIN */
-
#ifdef POWERPC_PERFORMANCE_REPORT
void powerpc_display_perf_report(void);
/* the 604* have 2, the G3* have 4, the G4s have 6,