arm64: dts: rockchip: add cr50 tpm to rk3399-gru scarlet and bob

Scarlet and Bob use the Google-developed cr50 chip to do things
like TPM and closed-case-debugging.

Add the nodes describing the cr50 and its spi-connection.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20180822120925.12388-1-heiko@sntech.de

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts b/arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts
index a9f4d6d..9dd3b17 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts
@@ -68,6 +68,16 @@
 
 &spi0 {
        status = "okay";
+
+       cr50@0 {
+               compatible = "google,cr50";
+               reg = <0>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <5 IRQ_TYPE_EDGE_RISING>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&h1_int_od_l>;
+               spi-max-frequency = <800000>;
+       };
 };
 
 &pinctrl {

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
index 50dfab5..4373ed7 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
@@ -436,6 +436,16 @@ camera: &i2c7 {
 
 &spi2 {
        status = "okay";
+
+       cr50@0 {
+               compatible = "google,cr50";
+               reg = <0>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <17 IRQ_TYPE_EDGE_RISING>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&h1_int_od_l>;
+               spi-max-frequency = <800000>;
+       };
 };
 
 &usb_host0_ohci {