* gas/all/fwdexp.d: Also look for f8ffffff.

        * gas/arm/msr-reg-thumb.d: Skip for non-ELF based targets.
        * gas/arm/vldr.d: Likewise.
        * gas/arm/thumb2_ldmstm.d: Allow for extra NOPs at the end of the disassembly.
        * gas/cfi/cfi.exp (cfi-arm-1): Only run for ELF based ARM targets.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 06bc027..f980f33 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2010-10-22  Nick Clifton  <nickc@redhat.com>
+
+       * gas/all/fwdexp.d: Also look for f8ffffff.
+       * gas/arm/msr-reg-thumb.d: Skip for non-ELF based targets.
+       * gas/arm/vldr.d: Likewise.
+       * gas/arm/thumb2_ldmstm.d: Allow for extra NOPs at the end of the disassembly.
+       * gas/cfi/cfi.exp (cfi-arm-1): Only run for ELF based ARM targets.
+
 2010-10-21  Joseph Myers  <joseph@codesourcery.com>
 
        * gas/tic6x/attr-arch-directive-1.d,

diff --git a/gas/testsuite/gas/all/fwdexp.d b/gas/testsuite/gas/all/fwdexp.d
index b30e350..222dab2 100644 (file)
--- a/gas/testsuite/gas/all/fwdexp.d
+++ b/gas/testsuite/gas/all/fwdexp.d
@@ -8,4 +8,4 @@ OFFSET +TYPE +VALUE
 0+ .*(\.data|i)(|\+0xf+e|\+0xf+c|\+0xf+8)
 
 Contents of section .*
- 0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff ffffffff|ffffffff fffffff8) .*
+ 0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff|f8ffffff ffffffff|ffffffff fffffff8) .*

diff --git a/gas/testsuite/gas/arm/msr-reg-thumb.d b/gas/testsuite/gas/arm/msr-reg-thumb.d
index 0c92e56..e449af1 100644 (file)
--- a/gas/testsuite/gas/arm/msr-reg-thumb.d
+++ b/gas/testsuite/gas/arm/msr-reg-thumb.d
@@ -2,6 +2,7 @@
 # as: -march=armv7-a -mthumb
 # source: msr-reg.s
 # objdump: -dr --prefix-addresses --show-raw-insn
+# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
 
 .*: +file format .*arm.*
 

diff --git a/gas/testsuite/gas/arm/thumb2_ldmstm.d b/gas/testsuite/gas/arm/thumb2_ldmstm.d
index f89bf16..3ab53ac 100644 (file)
--- a/gas/testsuite/gas/arm/thumb2_ldmstm.d
+++ b/gas/testsuite/gas/arm/thumb2_ldmstm.d
@@ -57,3 +57,4 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> 9800        ldr     r0, \[sp, #0\]
 0[0-9a-f]+ <[^>]+> f848 9b04   str.w   r9, \[r8\], #4
 0[0-9a-f]+ <[^>]+> f8c8 9000   str.w   r9, \[r8\]
+#pass

diff --git a/gas/testsuite/gas/arm/vldr.d b/gas/testsuite/gas/arm/vldr.d
index d5c9331..fbb1560 100644 (file)
--- a/gas/testsuite/gas/arm/vldr.d
+++ b/gas/testsuite/gas/arm/vldr.d
@@ -2,6 +2,7 @@
 # as: -mfpu=vfp3 -mcpu=cortex-a8 -mthumb
 # source: vldr.s
 # objdump: -dr --prefix-addresses --show-raw-insn
+# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
 
 .*: +file format .*arm.*
 

diff --git a/gas/testsuite/gas/cfi/cfi.exp b/gas/testsuite/gas/cfi/cfi.exp
index 1999db6..7642e01 100644 (file)
--- a/gas/testsuite/gas/cfi/cfi.exp
+++ b/gas/testsuite/gas/cfi/cfi.exp
@@ -73,6 +73,10 @@ if  { [istarget "i*86-*-*"] || [istarget "x86_64-*-*"] } then {
     }
 
 } elseif { [istarget "arm*-*"] || [istarget "xscale*-*"] } then {
+    # Only ELF based ARM targets support CFI.
+    if { [is_pecoff_format] } then {
+       return
+    }
     run_dump_test "cfi-arm-1"
 
 } elseif { [istarget "mips*-*"] } then {