CPUFREQ: add dvfs cpufreq and latency.
authorhong.guo <hong.guo@amlogic.com>
Sun, 4 Feb 2018 05:46:10 +0000 (13:46 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Mon, 5 Mar 2018 07:34:26 +0000 (15:34 +0800)
PD#156734: cpufreq: add dvfs cpufreq cpufreq and latency.

Change-Id: I0d7c74e54b2e6dcbd949c1c59cce41deec5047f7
Signed-off-by: hong.guo <hong.guo@amlogic.com>
arch/arm64/boot/dts/amlogic/mesong12a.dtsi
drivers/amlogic/clk/g12a/g12a.h

index d6ad119..c80fc91 100644 (file)
@@ -66,6 +66,7 @@
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
                        voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                CPU1:cpu@1 {
@@ -83,6 +84,7 @@
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
                        voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                CPU2:cpu@2 {
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
                        voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                CPU3:cpu@3 {
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
                        voltage-tolerance = <0>;
+                       clock-latency = <50000>;
                };
 
                idle-states {
                        opp00 {
                                opp-hz = /bits/ 64 <100000000>;
                                opp-microvolt = <761000>;
-                               clock-latency-ns = <2000000>;
                        };
                        opp01 {
                                opp-hz = /bits/ 64 <250000000>;
                                opp-microvolt = <781000>;
-                               clock-latency-ns = <2000000>;
                        };
                        opp02 {
                                opp-hz = /bits/ 64 <500000000>;
                                opp-microvolt = <801000>;
-                               clock-latency-ns = <2000000>;
                        };
                        opp03 {
                                opp-hz = /bits/ 64 <667000000>;
                                opp-microvolt = <851000>;
-                               clock-latency-ns = <2000000>;
                        };
                        opp04 {
                                opp-hz = /bits/ 64 <1000000000>;
                                opp-microvolt = <881000>;
-                               clock-latency-ns = <2000000>;
                        };
                        opp05 {
                                opp-hz = /bits/ 64 <1200000000>;
                                opp-microvolt = <891000>;
-                               clock-latency-ns = <2000000>;
                        };
                        opp06 {
                                opp-hz = /bits/ 64 <1398000000>;
-                               opp-microvolt = <981000>;
-                               clock-latency-ns = <2000000>;
+                               opp-microvolt = <921000>;
                        };
                        opp07 {
+                               opp-hz = /bits/ 64 <1512000000>;
+                               opp-microvolt = <951000>;
+                       };
+                       opp08 {
                                opp-hz = /bits/ 64 <1608000000>;
                                opp-microvolt = <991000>;
-                               clock-latency-ns = <2000000>;
                        };
-                       opp08 {
+                       opp09 {
                                opp-hz = /bits/ 64 <1800000000>;
                                opp-microvolt = <1001000>;
-                               clock-latency-ns = <2000000>;
                        };
 
-                       opp09 {
+                       opp10 {
                                opp-hz = /bits/ 64 <2016000000>;
                                opp-microvolt = <1011000>;
-                               clock-latency-ns = <2000000>;
                        };
                };
 
index 1738191..506ad85 100644 (file)
@@ -130,6 +130,7 @@ static const struct pll_rate_table g12a_pll_rate_table[] = {
        PLL_RATE(1296000000, 216, 1, 2), /*DCO=5184M*/
        PLL_RATE(1398000000, 233, 1, 2), /*DCO=5592M*/
        PLL_RATE(1494000000, 249, 1, 2), /*DCO=5976M*/
+       PLL_RATE(1512000000, 126, 1, 1), /*DCO=3024M*/
        PLL_RATE(1608000000, 134, 1, 1), /*DCO=3216M*/
        PLL_RATE(1704000000, 142, 1, 1), /*DCO=3408M*/
        PLL_RATE(1800000000, 150, 1, 1), /*DCO=3600M*/