arm64: zynqmp: Define all eeproms for SC on vck190
authorMichal Simek <michal.simek@xilinx.com>
Fri, 24 Sep 2021 13:04:57 +0000 (15:04 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 30 Sep 2021 10:29:49 +0000 (12:29 +0200)
There are multiple eeproms on vck190 that's why list all of them.
FMC eeproms are present only when fmcs are plugged.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/96902661e3ab9e20b59d626e6129ccf6f3317c4d.1632488695.git.michal.simek@xilinx.com
arch/arm/dts/zynqmp-e-a2197-00-revA.dts

index bd0ba55..f229880 100644 (file)
@@ -24,6 +24,9 @@
                i2c1 = &i2c1;
                mmc0 = &sdhci1;
                nvmem0 = &eeprom;
+               nvmem1 = &eeprom_ebm;
+               nvmem2 = &eeprom_fmc1;
+               nvmem3 = &eeprom_fmc2;
                rtc0 = &rtc;
                serial0 = &uart0;
                serial1 = &dcc;
                                silabs,skip-recall;
                        };
                        /* and connector J212D */
+                       eeprom_ebm: eeprom@52 { /* x-ebm module */
+                               compatible = "st,24c128", "atmel,24c128";
+                               reg = <0x52>;
+                       };
                };
                fmc1: i2c@1 { /* FMCP1_IIC */
                        #address-cells = <1>;
                        reg = <1>;
                        /* FIXME connection to Samtec J51C */
                        /* expected eeprom 0x50 FMC cards */
+                       eeprom_fmc1: eeprom@50 {
+                               compatible = "st,24c128", "atmel,24c128";
+                               reg = <0x50>;
+                       };
                };
                fmc2: i2c@2 { /* FMCP2_IIC */
                        #address-cells = <1>;
                        reg = <2>;
                        /* FIXME connection to Samtec J53C */
                        /* expected eeprom 0x50 FMC cards */
+                       eeprom_fmc2: eeprom@50 {
+                               compatible = "st,24c128", "atmel,24c128";
+                               reg = <0x50>;
+                       };
                };
                i2c@3 { /* DDR4_DIMM1 */
                        #address-cells = <1>;