drm/i915: Expand is_lp backwards to gen8_lp and gen7_lp.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Sun, 18 Dec 2016 21:36:26 +0000 (13:36 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 19 Dec 2016 19:08:00 +0000 (11:08 -0800)
Valleyview/Baytrail (gen7_lp) and Cherryview/Braswell (gen8_lp)
are both Atom platforms like Broxton/Apollolake and Geminilake.

So let's expand this is_lp back to these platforms and
create the IS_LP(dev_priv) so we can start simplifying a bit
our if/else for platform lists.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1482096988-400-1-git-send-email-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c

index 785e04c..87e4349 100644 (file)
@@ -2829,6 +2829,7 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_GEN9(dev_priv)      (!!((dev_priv)->info.gen_mask & BIT(8)))
 
 #define IS_GEN9_LP(dev_priv)   (IS_GEN9(dev_priv) && INTEL_INFO(dev_priv)->is_lp)
+#define IS_LP(dev_priv)        (INTEL_INFO(dev_priv)->is_lp)
 
 #define ENGINE_MASK(id)        BIT(id)
 #define RENDER_RING    ENGINE_MASK(RCS)
index 93f50ef..9885458 100644 (file)
@@ -267,6 +267,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
 
 #define VLV_FEATURES  \
        .gen = 7, .num_pipes = 2, \
+       .is_lp = 1, \
        .has_psr = 1, \
        .has_runtime_pm = 1, \
        .has_rc6 = 1, \
@@ -326,6 +327,7 @@ static const struct intel_device_info intel_broadwell_gt3_info = {
 static const struct intel_device_info intel_cherryview_info = {
        .gen = 8, .num_pipes = 3,
        .has_hotplug = 1,
+       .is_lp = 1,
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
        .platform = INTEL_CHERRYVIEW,
        .has_64bit_reloc = 1,