NTB: Correct Number of Scratch Pad Registers

The NTB Xeon hardware has 16 scratch pad registers and 16 back-to-back
scratch pad registers.  Correct the #define to represent this and update
the variable names to reflect their usage.

Signed-off-by: Jon Mason <jon.mason@intel.com>

diff --git a/drivers/ntb/ntb_hw.c b/drivers/ntb/ntb_hw.c
index 515099e..3b0ab50 100644 (file)
--- a/drivers/ntb/ntb_hw.c
+++ b/drivers/ntb/ntb_hw.c
@@ -547,7 +547,7 @@ static int ntb_xeon_setup(struct ntb_device *ndev)
        if (ndev->conn_type == NTB_CONN_B2B) {
                ndev->reg_ofs.sdb = ndev->reg_base + SNB_B2B_DOORBELL_OFFSET;
                ndev->reg_ofs.spad_write = ndev->reg_base + SNB_B2B_SPAD_OFFSET;
-               ndev->limits.max_spads = SNB_MAX_SPADS;
+               ndev->limits.max_spads = SNB_MAX_B2B_SPADS;
        } else {
                ndev->reg_ofs.sdb = ndev->reg_base + SNB_SDOORBELL_OFFSET;
                ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET;

diff --git a/drivers/ntb/ntb_regs.h b/drivers/ntb/ntb_regs.h
index 5bfa8c0..96209b4 100644 (file)
--- a/drivers/ntb/ntb_regs.h
+++ b/drivers/ntb/ntb_regs.h
@@ -53,8 +53,8 @@
 #define NTB_LINK_WIDTH_MASK    0x03f0
 
 #define SNB_MSIX_CNT           4
-#define SNB_MAX_SPADS          16
-#define SNB_MAX_COMPAT_SPADS   8
+#define SNB_MAX_B2B_SPADS      16
+#define SNB_MAX_COMPAT_SPADS   16
 /* Reserve the uppermost bit for link interrupt */
 #define SNB_MAX_DB_BITS                15
 #define SNB_DB_BITS_PER_VEC    5