[AArch64] Add feature flags and command line for ARMv8.2 FP16 support.
authorMatthew Wahab <matthew.wahab@arm.com>
Fri, 27 Nov 2015 13:19:50 +0000 (13:19 +0000)
committerMatthew Wahab <matthew.wahab@arm.com>
Fri, 27 Nov 2015 13:19:50 +0000 (13:19 +0000)
ARMv8.2 adds optional support for 16-bit operations to the FP and
Adv.SIMD instructions. This patch adds a feature macro for this support
with a new command line option "+fp16" to enable/disable it.

Although the command line option is added as an architecture extension,
it only affects instructions available with when +fp or +simd is
enabled. If +fp16 is specified then it will also enable +fp.

There are currently no FP16 instructions implemented in binutils, this
patch is to enable subsequent work on supporting the extension.

gas/
2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>

* config/tc-aarch64.c (aarch64_features): Add "fp16".
* doc/c-aarch64.texi (Architecture Extensions): Add "fp16".

include/opcode/
2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>

* aarch64.h (AARCH64_FEATURE_F16): New.
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2
features.

Change-Id: Id2021e0513946e16d0935c2a5b9605574cdff95a

gas/ChangeLog
gas/config/tc-aarch64.c
gas/doc/c-aarch64.texi
include/opcode/ChangeLog
include/opcode/aarch64.h

index 1077066..b465923 100644 (file)
@@ -1,3 +1,8 @@
+2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-aarch64.c (aarch64_features): Add "fp16".
+       * doc/c-aarch64.texi (Architecture Extensions): Add "fp16".
+
 2015-11-24  Christophe Monat <christophe.monat@st.com>
 
        * config/tc-arm.c (move_or_literal_pool): Do not transform ldr
index 0fd6443..d306710 100644 (file)
@@ -7738,6 +7738,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"lor",              AARCH64_FEATURE (AARCH64_FEATURE_LOR, 0)},
   {"rdma",             AARCH64_FEATURE (AARCH64_FEATURE_SIMD
                                         | AARCH64_FEATURE_RDMA, 0)},
+  {"fp16",             AARCH64_FEATURE (AARCH64_FEATURE_F16
+                                        | AARCH64_FEATURE_FP, 0)},
   {NULL,               AARCH64_ARCH_NONE}
 };
 
index bfd41c3..2717af2 100644 (file)
@@ -142,6 +142,9 @@ automatically cause those extensions to be disabled.
  @tab Enable Limited Ordering Regions extensions.
 @item @code{rdma} @tab ARMv8-A @tab ARMv8-A or later
  @tab Enable ARMv8.1 Advanced SIMD extensions.  This implies @code{simd}.
+@item @code{fp16} @tab ARMv8.2-A @tab ARMv8.2-A or later
+ @tab Enable ARMv8.2 16-bit floating-point support.  This implies
+ @code{fp}.
 @end multitable
 
 @node AArch64 Syntax
index a682414..57200d6 100644 (file)
@@ -1,3 +1,9 @@
+2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * aarch64.h (AARCH64_FEATURE_F16): New.
+       (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2
+       features.
+
 2015-11-20  Matthew Wahab  <matthew.wahab@arm.com>
 
        * aarch64.h (AARCH64_FEATURE_V8_1): New.
index 9addf40..cc16f6f 100644 (file)
@@ -48,6 +48,7 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_FEATURE_LOR    0x00400000      /* LOR instructions.  */
 #define AARCH64_FEATURE_RDMA   0x00800000      /* v8.1 SIMD instructions.  */
 #define AARCH64_FEATURE_V8_1   0x01000000      /* v8.1 features.  */
+#define AARCH64_FEATURE_F16    0x01000000      /* v8.2 FP16 instructions.  */
 
 /* Architectures are the sum of the base and extensions.  */
 #define AARCH64_ARCH_V8                AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -63,6 +64,7 @@ typedef uint32_t aarch64_insn;
                                                 | AARCH64_FEATURE_RDMA)
 #define AARCH64_ARCH_V8_2      AARCH64_FEATURE (AARCH64_FEATURE_V8,    \
                                                 AARCH64_FEATURE_V8_2   \
+                                                | AARCH64_FEATURE_F16  \
                                                 | AARCH64_FEATURE_FP   \
                                                 | AARCH64_FEATURE_SIMD \
                                                 | AARCH64_FEATURE_LSE  \