program->shader.binary.global_symbol_offsets[i];
unsigned scratch_bytes_needed;
- si_shader_binary_read_config(sctx->screen,
- &program->shader, offset);
+ si_shader_binary_read_config(&program->shader, offset);
scratch_bytes_needed = program->shader.scratch_bytes_per_wave;
scratch_bytes = MAX2(scratch_bytes, scratch_bytes_needed);
}
#if HAVE_LLVM >= 0x0306
/* Read the config information */
- si_shader_binary_read_config(sctx->screen, shader, pc);
+ si_shader_binary_read_config(shader, pc);
#endif
/* Upload the kernel arguments */
}
}
-void si_shader_binary_read_config(const struct si_screen *sscreen,
- struct si_shader *shader,
- unsigned symbol_offset)
+void si_shader_binary_read_config(struct si_shader *shader,
+ unsigned symbol_offset)
{
unsigned i;
const unsigned char *config =
{
const struct radeon_shader_binary *binary = &shader->binary;
- si_shader_binary_read_config(sscreen, shader, 0);
+ si_shader_binary_read_config(shader, 0);
if (r600_can_dump_shader(&sscreen->b, processor)) {
if (!(sscreen->b.debug_flags & DBG_NO_ASM))
void si_shader_apply_scratch_relocs(struct si_context *sctx,
struct si_shader *shader,
uint64_t scratch_va);
-void si_shader_binary_read_config(const struct si_screen *sscreen,
- struct si_shader *shader,
- unsigned symbol_offset);
+void si_shader_binary_read_config(struct si_shader *shader,
+ unsigned symbol_offset);
#endif