clk: microchip: mpfs-ccc: Use devm_kasprintf() for allocating formatted strings

In various places, string buffers of a fixed size are allocated, and
filled using snprintf() with the same fixed size, which is error-prone.

Replace this by calling devm_kasprintf() instead, which always uses the
appropriate size.

While at it, remove an unneeded intermediate variable, which allows us
to drop a cast as a bonus.

With the initial behavior it would have been possible to have a device tree
with a node address that would make "ccc<node_address>_pll<N>" exceed
18 characters. If that happened, the <N> would be cut off & both
pll 0 & 1 would be named identically. If that happens, pll1 would fail
to register. Thus, the fixes tag has been added to this commit.

Fixes: d39fb172760e ("clk: microchip: add PolarFire SoC fabric clock support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
[claudiu.beznea: added the rationale behind fixes tag]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/f904fd28b2087d1463ea65f059924e3b1acc193c.1672764239.git.geert+renesas@glider.be

diff --git a/drivers/clk/microchip/clk-mpfs-ccc.c b/drivers/clk/microchip/clk-mpfs-ccc.c
index 32aae88..0ddc73e 100644 (file)
--- a/drivers/clk/microchip/clk-mpfs-ccc.c
+++ b/drivers/clk/microchip/clk-mpfs-ccc.c
@@ -164,12 +164,11 @@ static int mpfs_ccc_register_outputs(struct device *dev, struct mpfs_ccc_out_hw_
 
        for (unsigned int i = 0; i < num_clks; i++) {
                struct mpfs_ccc_out_hw_clock *out_hw = &out_hws[i];
-               char *name = devm_kzalloc(dev, 23, GFP_KERNEL);
+               char *name = devm_kasprintf(dev, GFP_KERNEL, "%s_out%u", parent->name, i);
 
                if (!name)
                        return -ENOMEM;
 
-               snprintf(name, 23, "%s_out%u", parent->name, i);
                out_hw->divider.hw.init = CLK_HW_INIT_HW(name, &parent->hw, &clk_divider_ops, 0);
                out_hw->divider.reg = data->pll_base[i / MPFS_CCC_OUTPUTS_PER_PLL] +
                        out_hw->reg_offset;
@@ -201,14 +200,13 @@ static int mpfs_ccc_register_plls(struct device *dev, struct mpfs_ccc_pll_hw_clo
 
        for (unsigned int i = 0; i < num_clks; i++) {
                struct mpfs_ccc_pll_hw_clock *pll_hw = &pll_hws[i];
-               char *name = devm_kzalloc(dev, 18, GFP_KERNEL);
 
-               if (!name)
+               pll_hw->name = devm_kasprintf(dev, GFP_KERNEL, "ccc%s_pll%u",
+                                             strchrnul(dev->of_node->full_name, '@'), i);
+               if (!pll_hw->name)
                        return -ENOMEM;
 
                pll_hw->base = data->pll_base[i];
-               snprintf(name, 18, "ccc%s_pll%u", strchrnul(dev->of_node->full_name, '@'), i);
-               pll_hw->name = (const char *)name;
                pll_hw->hw.init = CLK_HW_INIT_PARENTS_DATA_FIXED_SIZE(pll_hw->name,
                                                                      pll_hw->parents,
                                                                      &mpfs_ccc_pll_ops, 0);