drm/i915: add HAS_POWER_WELL
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Wed, 6 Mar 2013 23:03:18 +0000 (20:03 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sun, 17 Mar 2013 20:49:23 +0000 (21:49 +0100)
We're starting to add many IS_HASWELL checks for the power well code,
so add a HAS_POWER_WELL macro to properly document that we're checking
for hardware that has the power down well.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Resolve conflicts since some converted code was added by
not-yet merged patches.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_pm.c

index ca6b215..71f285c 100644 (file)
@@ -1339,6 +1339,7 @@ struct drm_i915_file_private {
 #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
 
 #define HAS_DDI(dev)           (IS_HASWELL(dev))
+#define HAS_POWER_WELL(dev)    (IS_HASWELL(dev))
 
 #define INTEL_PCH_DEVICE_ID_MASK               0xff00
 #define INTEL_PCH_IBX_DEVICE_ID_TYPE           0x3b00
index be43f71..44a23b9 100644 (file)
@@ -4076,7 +4076,7 @@ void intel_set_power_well(struct drm_device *dev, bool enable)
        bool is_enabled, enable_requested;
        uint32_t tmp;
 
-       if (!IS_HASWELL(dev))
+       if (!HAS_POWER_WELL(dev))
                return;
 
        tmp = I915_READ(HSW_PWR_WELL_DRIVER);
@@ -4111,7 +4111,7 @@ void intel_init_power_well(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
 
-       if (!IS_HASWELL(dev))
+       if (!HAS_POWER_WELL(dev))
                return;
 
        /* For now, we need the power well to be always enabled. */