x86: Make MSR_PKG_POWER_SKU common
authorSimon Glass <sjg@chromium.org>
Sat, 7 Dec 2019 04:42:34 +0000 (21:42 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 15 Dec 2019 03:44:20 +0000 (11:44 +0800)
This is used on several boards so add it to the common file. Also add a
useful power-limit value while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/include/asm/arch-broadwell/cpu.h
arch/x86/include/asm/arch-ivybridge/model_206ax.h
arch/x86/include/asm/msr-index.h

index 3bc3bd6..2b39a76 100644 (file)
@@ -27,7 +27,6 @@
 
 #define MSR_VR_CURRENT_CONFIG          0x601
 #define MSR_VR_MISC_CONFIG             0x603
-#define MSR_PKG_POWER_SKU              0x614
 #define MSR_DDR_RAPL_LIMIT             0x618
 #define MSR_VR_MISC_CONFIG2            0x636
 
index 4839ebc..5c06629 100644 (file)
@@ -43,7 +43,6 @@
 #define MSR_PP1_CURRENT_CONFIG         0x602
 #define  PP1_CURRENT_LIMIT_SNB         (35 << 3) /* 35 A */
 #define  PP1_CURRENT_LIMIT_IVB         (50 << 3) /* 50 A */
-#define MSR_PKG_POWER_SKU              0x614
 
 #define IVB_CONFIG_TDP_MIN_CPUID       0x306a2
 #define MSR_CONFIG_TDP_LEVEL1          0x649
index 5bc8b6c..79a9369 100644 (file)
 #define  PKG_POWER_LIMIT_CLAMP         (1 << 16)
 #define  PKG_POWER_LIMIT_TIME_SHIFT    17
 #define  PKG_POWER_LIMIT_TIME_MASK     0x7f
+/*
+ * For Mobile, RAPL default PL1 time window value set to 28 seconds.
+ * RAPL time window calculation defined as follows:
+ * Time Window = (float)((1+X/4)*(2*^Y), X Corresponds to [23:22],
+ * Y to [21:17] in MSR 0x610. 28 sec is equal to 0x6e.
+ */
+#define  MB_POWER_LIMIT1_TIME_DEFAULT  0x6e
 
 #define MSR_PKG_ENERGY_STATUS          0x00000611
 #define MSR_PKG_PERF_STATUS            0x00000613
-#define MSR_PKG_POWER_INFO             0x00000614
+#define MSR_PKG_POWER_SKU              0x614
 
 #define MSR_DRAM_POWER_LIMIT           0x00000618
 #define MSR_DRAM_ENERGY_STATUS         0x00000619