AMDGPU: Reorder checks
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 17 Oct 2020 18:28:52 +0000 (14:28 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 2 Nov 2020 15:21:48 +0000 (10:21 -0500)
llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp

index 21348f8..bac3dd9 100644 (file)
@@ -92,11 +92,10 @@ bool SIPreAllocateWWMRegs::processDef(MachineOperand &MO) {
     return false;
 
   Register Reg = MO.getReg();
-
-  if (!TRI->isVGPR(*MRI, Reg))
+  if (Reg.isPhysical())
     return false;
 
-  if (Reg.isPhysical())
+  if (!TRI->isVGPR(*MRI, Reg))
     return false;
 
   if (VRM->hasPhys(Reg))