Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED"
authorAlexandre Ghiti <alex@ghiti.fr>
Wed, 21 Jul 2021 07:59:36 +0000 (09:59 +0200)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Sat, 7 Aug 2021 05:41:39 +0000 (22:41 -0700)
This reverts commit 9b79878ced8f7ab85c57623f8b1f6882e484a316.

The removal of this config exposes CONFIG_PHYS_RAM_BASE for all kernel
types: this value being implementation-specific, this breaks the
genericity of the RISC-V kernel so revert it.

Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/Kconfig

index 31f9e92..4f7b70a 100644 (file)
@@ -495,8 +495,13 @@ config STACKPROTECTOR_PER_TASK
        depends on !GCC_PLUGIN_RANDSTRUCT
        depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
 
+config PHYS_RAM_BASE_FIXED
+       bool "Explicitly specified physical RAM address"
+       default n
+
 config PHYS_RAM_BASE
        hex "Platform Physical RAM address"
+       depends on PHYS_RAM_BASE_FIXED
        default "0x80000000"
        help
          This is the physical address of RAM in the system. It has to be
@@ -509,6 +514,7 @@ config XIP_KERNEL
        # This prevents XIP from being enabled by all{yes,mod}config, which
        # fail to build since XIP doesn't support large kernels.
        depends on !COMPILE_TEST
+       select PHYS_RAM_BASE_FIXED
        help
          Execute-In-Place allows the kernel to run from non-volatile storage
          directly addressable by the CPU, such as NOR flash. This saves RAM