- ti,k2g-pruss # for 66AK2G SoC family
- ti,am654-icssg # for K3 AM65x SoC family
- ti,j721e-icssg # for K3 J721E SoC family
+ - ti,am642-icssg # for K3 AM64x SoC family
reg:
maxItems: 1
dma-ranges:
maxItems: 1
+ dma-coherent: true
+
power-domains:
description: |
This property is as per sci-pm-domain.txt.
description: |
Industrial Ethernet Peripheral to manage/generate Industrial Ethernet
functions such as time stamping. Each PRUSS has either 1 IEP (on AM335x,
- AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x & J721E SoCs ). IEP
- is used for creating PTP clocks and generating PPS signals.
+ AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs).
+ IEP is used for creating PTP clocks and generating PPS signals.
type: object
# - interrupt-controller
# - pru
-if:
- properties:
- compatible:
- contains:
- enum:
- - ti,k2g-pruss
- - ti,am654-icssg
- - ti,j721e-icssg
-then:
- required:
- - power-domains
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,k2g-pruss
+ - ti,am654-icssg
+ - ti,j721e-icssg
+ - ti,am642-icssg
+ then:
+ required:
+ - power-domains
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,k2g-pruss
+ then:
+ required:
+ - dma-coherent
examples:
- |
SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
SYSC_QUIRK_LEGACY_IDLE),
- SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x24, -ENODEV, 0x00000000, 0xffffffff,
- SYSC_QUIRK_LEGACY_IDLE),
- SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x38, -ENODEV, 0x00000000, 0xffffffff,
- SYSC_QUIRK_LEGACY_IDLE),
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 0),
SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40000902, 0xffffffff, 0),
SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40002903, 0xffffffff, 0),
+ SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x24, -ENODEV, 0x00000000, 0xffffffff, 0),
+ SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x38, -ENODEV, 0x00000000, 0xffffffff, 0),
SYSC_QUIRK("spinlock", 0, 0, 0x10, -ENODEV, 0x50020000, 0xffffffff, 0),
SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -ENODEV, 0x00000020, 0xffffffff, 0),
SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000013, 0xffffffff, 0),
{ .compatible = "ti,k2g-pruss" },
{ .compatible = "ti,am654-icssg", .data = &am65x_j721e_pruss_data, },
{ .compatible = "ti,j721e-icssg", .data = &am65x_j721e_pruss_data, },
+ { .compatible = "ti,am642-icssg", .data = &am65x_j721e_pruss_data, },
{},
};
MODULE_DEVICE_TABLE(of, pruss_of_match);
static void sr_set_clk_length(struct omap_sr *sr)
{
- struct clk *fck;
u32 fclk_speed;
/* Try interconnect target module fck first if it already exists */
- fck = clk_get(sr->pdev->dev.parent, "fck");
- if (IS_ERR(fck)) {
- fck = clk_get(&sr->pdev->dev, "fck");
- if (IS_ERR(fck)) {
- dev_err(&sr->pdev->dev,
- "%s: unable to get fck for device %s\n",
- __func__, dev_name(&sr->pdev->dev));
- return;
- }
- }
+ if (IS_ERR(sr->fck))
+ return;
- fclk_speed = clk_get_rate(fck);
- clk_put(fck);
+ fclk_speed = clk_get_rate(sr->fck);
switch (fclk_speed) {
case 12000000:
/* errminlimit is opp dependent and hence linked to voltage */
sr->err_minlimit = nvalue_row->errminlimit;
- pm_runtime_get_sync(&sr->pdev->dev);
+ clk_enable(sr->fck);
/* Check if SR is already enabled. If yes do nothing */
if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
- return 0;
+ goto out_enabled;
/* Configure SR */
ret = sr_class->configure(sr);
if (ret)
- return ret;
+ goto out_enabled;
sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
/* SRCONFIG - enable SR */
sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
+
+out_enabled:
+ sr->enabled = 1;
+
return 0;
}
}
/* Check if SR clocks are already disabled. If yes do nothing */
- if (pm_runtime_suspended(&sr->pdev->dev))
+ if (!sr->enabled)
return;
/*
}
}
- pm_runtime_put_sync_suspend(&sr->pdev->dev);
+ clk_disable(sr->fck);
+ sr->enabled = 0;
}
/**
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ sr_info->fck = devm_clk_get(pdev->dev.parent, "fck");
+ if (IS_ERR(sr_info->fck))
+ return PTR_ERR(sr_info->fck);
+ clk_prepare(sr_info->fck);
+
pm_runtime_enable(&pdev->dev);
- pm_runtime_irq_safe(&pdev->dev);
snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
list_add(&sr_info->node, &sr_list);
- ret = pm_runtime_get_sync(&pdev->dev);
- if (ret < 0) {
- pm_runtime_put_noidle(&pdev->dev);
- goto err_list_del;
- }
-
/*
* Call into late init to do initializations that require
* both sr driver and sr class driver to be initiallized.
}
- pm_runtime_put_sync(&pdev->dev);
-
return ret;
err_debugfs:
debugfs_remove_recursive(sr_info->dbg_dir);
err_list_del:
list_del(&sr_info->node);
-
- pm_runtime_put_sync(&pdev->dev);
+ clk_unprepare(sr_info->fck);
return ret;
}
static int omap_sr_remove(struct platform_device *pdev)
{
struct omap_sr_data *pdata = pdev->dev.platform_data;
+ struct device *dev = &pdev->dev;
struct omap_sr *sr_info;
if (!pdata) {
sr_stop_vddautocomp(sr_info);
debugfs_remove_recursive(sr_info->dbg_dir);
- pm_runtime_disable(&pdev->dev);
+ pm_runtime_disable(dev);
+ clk_unprepare(sr_info->fck);
list_del(&sr_info->node);
return 0;
}
struct voltagedomain *voltdm;
struct dentry *dbg_dir;
unsigned int irq;
+ struct clk *fck;
int srid;
int ip_type;
int nvalue_count;
u32 senp_mod;
u32 senn_mod;
void __iomem *base;
+ unsigned long enabled:1;
};
/**