ARM: tegra: Add clock-cells property to PMC
authorSowjanya Komatineni <skomatineni@nvidia.com>
Tue, 14 Jan 2020 07:24:18 +0000 (23:24 -0800)
committerThierry Reding <treding@nvidia.com>
Fri, 13 Mar 2020 10:25:43 +0000 (11:25 +0100)
Tegra PMC has clk_out_1, clk_out_2, clk_out_3, and blink clock.

These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.

This patch adds #clock-cells property with 1 clock specifier to the
Tegra PMC node in device tree.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra114.dtsi
arch/arm/boot/dts/tegra124.dtsi
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi

index 0d7a632..450a1f1 100644 (file)
@@ -4,6 +4,7 @@
 #include <dt-bindings/memory/tegra114-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/tegra-pmc.h>
 
 / {
        compatible = "nvidia,tegra114";
                status = "disabled";
        };
 
-       pmc@7000e400 {
+       tegra_pmc: pmc@7000e400 {
                compatible = "nvidia,tegra114-pmc";
                reg = <0x7000e400 0x400>;
                clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
+               #clock-cells = <1>;
        };
 
        fuse@7000f800 {
index 7f330b1..94cac13 100644 (file)
@@ -6,6 +6,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/tegra124-car.h>
 #include <dt-bindings/thermal/tegra124-soctherm.h>
+#include <dt-bindings/soc/tegra-pmc.h>
 
 / {
        compatible = "nvidia,tegra124";
                clocks = <&tegra_car TEGRA124_CLK_RTC>;
        };
 
-       pmc@7000e400 {
+       tegra_pmc: pmc@7000e400 {
                compatible = "nvidia,tegra124-pmc";
                reg = <0x0 0x7000e400 0x0 0x400>;
                clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
+               #clock-cells = <1>;
        };
 
        fuse@7000f800 {
index 9c58e7f..c3b8ad5 100644 (file)
@@ -4,6 +4,7 @@
 #include <dt-bindings/memory/tegra20-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/tegra-pmc.h>
 
 / {
        compatible = "nvidia,tegra20";
                status = "disabled";
        };
 
-       pmc@7000e400 {
+       tegra_pmc: pmc@7000e400 {
                compatible = "nvidia,tegra20-pmc";
                reg = <0x7000e400 0x400>;
                clocks = <&tegra_car TEGRA20_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
+               #clock-cells = <1>;
        };
 
        mc: memory-controller@7000f000 {
index 55ae050..d2d05f1 100644 (file)
@@ -4,6 +4,7 @@
 #include <dt-bindings/memory/tegra30-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/tegra-pmc.h>
 
 / {
        compatible = "nvidia,tegra30";
                status = "disabled";
        };
 
-       pmc@7000e400 {
+       tegra_pmc: pmc@7000e400 {
                compatible = "nvidia,tegra30-pmc";
                reg = <0x7000e400 0x400>;
                clocks = <&tegra_car TEGRA30_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
+               #clock-cells = <1>;
        };
 
        mc: memory-controller@7000f000 {