staging: sm750fb: CHECK: Avoid CamelCase

This patch fixes the checkpatch.pl warning: CHECK: Avoid CamelCase for
the following files:

drivers/staging/sm750fb/ddk750_chip.c
drivers/staging/sm750fb/ddk750_chip.h
drivers/staging/sm750fb/ddk750_mode.c

Signed-off-by: Ido Tamir <ido.tamir@gmail.com>
Link: https://lore.kernel.org/r/20190906112241.GA2144@ubuntu-kernel
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index 5a317cc..e598881 100644 (file)
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -66,8 +66,8 @@ static void set_chip_clock(unsigned int frequency)
                /*
                 * Set up PLL structure to hold the value to be set in clocks.
                 */
-               pll.inputFreq = DEFAULT_INPUT_CLOCK; /* Defined in CLOCK.H */
-               pll.clockType = MXCLK_PLL;
+               pll.input_freq = DEFAULT_INPUT_CLOCK; /* Defined in CLOCK.H */
+               pll.clock_type = MXCLK_PLL;
 
                /*
                 * Call sm750_calc_pll_value() to fill the other fields
@@ -211,13 +211,13 @@ unsigned int ddk750_get_vm_size(void)
        return data;
 }
 
-int ddk750_init_hw(struct initchip_param *pInitParam)
+int ddk750_init_hw(struct initchip_param *p_init_param)
 {
        unsigned int reg;
 
-       if (pInitParam->powerMode != 0)
-               pInitParam->powerMode = 0;
-       sm750_set_power_mode(pInitParam->powerMode);
+       if (p_init_param->power_mode != 0)
+               p_init_param->power_mode = 0;
+       sm750_set_power_mode(p_init_param->power_mode);
 
        /* Enable display power gate & LOCALMEM power gate*/
        reg = peek32(CURRENT_GATE);
@@ -238,13 +238,13 @@ int ddk750_init_hw(struct initchip_param *pInitParam)
        }
 
        /* Set the Main Chip Clock */
-       set_chip_clock(MHz((unsigned int)pInitParam->chipClock));
+       set_chip_clock(MHz((unsigned int)p_init_param->chip_clock));
 
        /* Set up memory clock. */
-       set_memory_clock(MHz(pInitParam->memClock));
+       set_memory_clock(MHz(p_init_param->mem_clock));
 
        /* Set up master clock */
-       set_master_clock(MHz(pInitParam->masterClock));
+       set_master_clock(MHz(p_init_param->master_clock));
 
        /*
         * Reset the memory controller.
@@ -252,7 +252,7 @@ int ddk750_init_hw(struct initchip_param *pInitParam)
         * the system might hang when sw accesses the memory.
         * The memory should be resetted after changing the MXCLK.
         */
-       if (pInitParam->resetMemory == 1) {
+       if (p_init_param->reset_memory == 1) {
                reg = peek32(MISC_CTRL);
                reg &= ~MISC_CTRL_LOCALMEM_RESET;
                poke32(MISC_CTRL, reg);
@@ -261,7 +261,7 @@ int ddk750_init_hw(struct initchip_param *pInitParam)
                poke32(MISC_CTRL, reg);
        }
 
-       if (pInitParam->setAllEngOff == 1) {
+       if (p_init_param->set_all_eng_off == 1) {
                sm750_enable_2d_engine(0);
 
                /* Disable Overlay, if a former application left it on */
@@ -337,13 +337,13 @@ unsigned int sm750_calc_pll_value(unsigned int request_orig,
        ret = 0;
        mini_diff = ~0;
        request = request_orig / 1000;
-       input = pll->inputFreq / 1000;
+       input = pll->input_freq / 1000;
 
        /*
         * for MXCLK register,
         * no POD provided, so need be treated differently
         */
-       if (pll->clockType == MXCLK_PLL)
+       if (pll->clock_type == MXCLK_PLL)
                max_d = 3;
 
        for (N = 15; N > 1; N--) {
@@ -365,7 +365,7 @@ unsigned int sm750_calc_pll_value(unsigned int request_orig,
                        if (M < 256 && M > 0) {
                                unsigned int diff;
 
-                               tmp_clock = pll->inputFreq * M / N / X;
+                               tmp_clock = pll->input_freq * M / N / X;
                                diff = abs(tmp_clock - request_orig);
                                if (diff < mini_diff) {
                                        pll->M = M;
@@ -383,14 +383,14 @@ unsigned int sm750_calc_pll_value(unsigned int request_orig,
        return ret;
 }
 
-unsigned int sm750_format_pll_reg(struct pll_value *pPLL)
+unsigned int sm750_format_pll_reg(struct pll_value *p_PLL)
 {
 #ifndef VALIDATION_CHIP
-       unsigned int POD = pPLL->POD;
+       unsigned int POD = p_PLL->POD;
 #endif
-       unsigned int OD = pPLL->OD;
-       unsigned int M = pPLL->M;
-       unsigned int N = pPLL->N;
+       unsigned int OD = p_PLL->OD;
+       unsigned int M = p_PLL->M;
+       unsigned int N = p_PLL->N;
 
        /*
         * Note that all PLL's have the same format. Here, we just use

diff --git a/drivers/staging/sm750fb/ddk750_chip.h b/drivers/staging/sm750fb/ddk750_chip.h
index 3e92b32..ee2e9d9 100644 (file)
--- a/drivers/staging/sm750fb/ddk750_chip.h
+++ b/drivers/staging/sm750fb/ddk750_chip.h
@@ -40,8 +40,8 @@ enum clock_type {
 };
 
 struct pll_value {
-       enum clock_type clockType;
-       unsigned long inputFreq; /* Input clock frequency to the PLL */
+       enum clock_type clock_type;
+       unsigned long input_freq; /* Input clock frequency to the PLL */
 
        /* Use this when clockType = PANEL_PLL */
        unsigned long M;
@@ -53,41 +53,41 @@ struct pll_value {
 /* input struct to initChipParam() function */
 struct initchip_param {
        /* Use power mode 0 or 1 */
-       unsigned short powerMode;
+       unsigned short power_mode;
 
        /*
         * Speed of main chip clock in MHz unit
         * 0 = keep the current clock setting
         * Others = the new main chip clock
         */
-       unsigned short chipClock;
+       unsigned short chip_clock;
 
        /*
         * Speed of memory clock in MHz unit
         * 0 = keep the current clock setting
         * Others = the new memory clock
         */
-       unsigned short memClock;
+       unsigned short mem_clock;
 
        /*
         * Speed of master clock in MHz unit
         * 0 = keep the current clock setting
         * Others = the new master clock
         */
-       unsigned short masterClock;
+       unsigned short master_clock;
 
        /*
         * 0 = leave all engine state untouched.
         * 1 = make sure they are off: 2D, Overlay,
         * video alpha, alpha, hardware cursors
         */
-       unsigned short setAllEngOff;
+       unsigned short set_all_eng_off;
 
        /*
         * 0 = Do not reset the memory controller
         * 1 = Reset the memory controller
         */
-       unsigned char resetMemory;
+       unsigned char reset_memory;
 
        /* More initialization parameter can be added if needed */
 };
@@ -95,7 +95,7 @@ struct initchip_param {
 enum logical_chip_type sm750_get_chip_type(void);
 void sm750_set_chip_type(unsigned short dev_id, u8 rev_id);
 unsigned int sm750_calc_pll_value(unsigned int request, struct  pll_value *pll);
-unsigned int sm750_format_pll_reg(struct pll_value *pPLL);
+unsigned int sm750_format_pll_reg(struct pll_value *p_PLL);
 unsigned int ddk750_get_vm_size(void);
 int ddk750_init_hw(struct initchip_param *pinit_param);
 

diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
index 4dac691..9722692 100644 (file)
--- a/drivers/staging/sm750fb/ddk750_mode.c
+++ b/drivers/staging/sm750fb/ddk750_mode.c
@@ -81,7 +81,7 @@ static int programModeRegisters(struct mode_parameter *pModeParam,
        int cnt = 0;
        unsigned int tmp, reg;
 
-       if (pll->clockType == SECONDARY_PLL) {
+       if (pll->clock_type == SECONDARY_PLL) {
                /* programe secondary pixel clock */
                poke32(CRT_PLL_CTRL, sm750_format_pll_reg(pll));
 
@@ -134,7 +134,7 @@ static int programModeRegisters(struct mode_parameter *pModeParam,
                        poke32(CRT_DISPLAY_CTRL, tmp | reg);
                }
 
-       } else if (pll->clockType == PRIMARY_PLL) {
+       } else if (pll->clock_type == PRIMARY_PLL) {
                unsigned int reserved;
 
                poke32(PANEL_PLL_CTRL, sm750_format_pll_reg(pll));
@@ -211,8 +211,8 @@ int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock)
        struct pll_value pll;
        unsigned int uiActualPixelClk;
 
-       pll.inputFreq = DEFAULT_INPUT_CLOCK;
-       pll.clockType = clock;
+       pll.input_freq = DEFAULT_INPUT_CLOCK;
+       pll.clock_type = clock;
 
        uiActualPixelClk = sm750_calc_pll_value(parm->pixel_clock, &pll);
        if (sm750_get_chip_type() == SM750LE) {