Optimize to avoid an unnecessary FPCR read.

diff --git a/ChangeLog b/ChangeLog
index c8db220..708f8a9 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
 2014-12-22  Wilco Dijkstra  <wdijkstr@arm.com>
 
+       * sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept):
+       Optimize to avoid an unnecessary FPCR read.
+
+2014-12-22  Wilco Dijkstra  <wdijkstr@arm.com>
+
        * sysdeps/aarch64/fpu/fesetenv.c (fesetenv):
        Optimize to reduce FPCR/FPSR accesses.