[clang][test][RISCV] Precommit zhinx coverage in Float16-arith.c test

Now codegen support is present, we should set HasLeftHalfType=true if
zhinx is present. This adds test coverage prior to making that change.

diff --git a/clang/test/CodeGen/RISCV/Float16-arith.c b/clang/test/CodeGen/RISCV/Float16-arith.c
index 8fb3c1b..baedc07 100644 (file)
--- a/clang/test/CodeGen/RISCV/Float16-arith.c
+++ b/clang/test/CodeGen/RISCV/Float16-arith.c
@@ -1,29 +1,33 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
 // RUN: %clang_cc1 -triple riscv32 -emit-llvm %s -o - \
-// RUN:   | FileCheck -check-prefix=NOZFH %s
+// RUN:   | FileCheck -check-prefix=NOHALF %s
 // RUN: %clang_cc1 -triple riscv64 -emit-llvm %s -o - \
-// RUN:   | FileCheck -check-prefix=NOZFH %s
+// RUN:   | FileCheck -check-prefix=NOHALF %s
 // RUN: %clang_cc1 -triple riscv32 -target-feature +zfh -emit-llvm %s -o - \
 // RUN:   | FileCheck -check-prefix=ZFH %s
 // RUN: %clang_cc1 -triple riscv64 -target-feature +zfh -emit-llvm %s -o - \
 // RUN:   | FileCheck -check-prefix=ZFH %s
+// RUN: %clang_cc1 -triple riscv32 -target-feature +zhinx -emit-llvm %s -o - \
+// RUN:   | FileCheck -check-prefix=ZHINX %s
+// RUN: %clang_cc1 -triple riscv64 -target-feature +zhinx -emit-llvm %s -o - \
+// RUN:   | FileCheck -check-prefix=ZHINX %s
 
 _Float16 x, y, z;
 
 // With no native half type support (no zfh), f16 will be promoted to f32.
 // With zfh, it shouldn't be.
 
-// NOZFH-LABEL: define dso_local void @f16_add
-// NOZFH-SAME: () #[[ATTR0:[0-9]+]] {
-// NOZFH-NEXT:  entry:
-// NOZFH-NEXT:    [[TMP0:%.*]] = load half, ptr @y, align 2
-// NOZFH-NEXT:    [[EXT:%.*]] = fpext half [[TMP0]] to float
-// NOZFH-NEXT:    [[TMP1:%.*]] = load half, ptr @z, align 2
-// NOZFH-NEXT:    [[EXT1:%.*]] = fpext half [[TMP1]] to float
-// NOZFH-NEXT:    [[ADD:%.*]] = fadd float [[EXT]], [[EXT1]]
-// NOZFH-NEXT:    [[UNPROMOTION:%.*]] = fptrunc float [[ADD]] to half
-// NOZFH-NEXT:    store half [[UNPROMOTION]], ptr @x, align 2
-// NOZFH-NEXT:    ret void
+// NOHALF-LABEL: define dso_local void @f16_add
+// NOHALF-SAME: () #[[ATTR0:[0-9]+]] {
+// NOHALF-NEXT:  entry:
+// NOHALF-NEXT:    [[TMP0:%.*]] = load half, ptr @y, align 2
+// NOHALF-NEXT:    [[EXT:%.*]] = fpext half [[TMP0]] to float
+// NOHALF-NEXT:    [[TMP1:%.*]] = load half, ptr @z, align 2
+// NOHALF-NEXT:    [[EXT1:%.*]] = fpext half [[TMP1]] to float
+// NOHALF-NEXT:    [[ADD:%.*]] = fadd float [[EXT]], [[EXT1]]
+// NOHALF-NEXT:    [[UNPROMOTION:%.*]] = fptrunc float [[ADD]] to half
+// NOHALF-NEXT:    store half [[UNPROMOTION]], ptr @x, align 2
+// NOHALF-NEXT:    ret void
 //
 // ZFH-LABEL: define dso_local void @f16_add
 // ZFH-SAME: () #[[ATTR0:[0-9]+]] {
@@ -34,6 +38,18 @@ _Float16 x, y, z;
 // ZFH-NEXT:    store half [[ADD]], ptr @x, align 2
 // ZFH-NEXT:    ret void
 //
+// ZHINX-LABEL: define dso_local void @f16_add
+// ZHINX-SAME: () #[[ATTR0:[0-9]+]] {
+// ZHINX-NEXT:  entry:
+// ZHINX-NEXT:    [[TMP0:%.*]] = load half, ptr @y, align 2
+// ZHINX-NEXT:    [[EXT:%.*]] = fpext half [[TMP0]] to float
+// ZHINX-NEXT:    [[TMP1:%.*]] = load half, ptr @z, align 2
+// ZHINX-NEXT:    [[EXT1:%.*]] = fpext half [[TMP1]] to float
+// ZHINX-NEXT:    [[ADD:%.*]] = fadd float [[EXT]], [[EXT1]]
+// ZHINX-NEXT:    [[UNPROMOTION:%.*]] = fptrunc float [[ADD]] to half
+// ZHINX-NEXT:    store half [[UNPROMOTION]], ptr @x, align 2
+// ZHINX-NEXT:    ret void
+//
 void f16_add() {
   x = y + z;
 }