drm/i915: DG2 and ATS-M device ID updates
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 1 Jul 2022 15:22:31 +0000 (08:22 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Fri, 1 Jul 2022 23:22:13 +0000 (16:22 -0700)
Small BAR support has now landed, which allows us to add the PCI IDs
that correspond to add-in card designs of DG2 and ATS-M.  There's also
one additional MB-down PCI ID that recently appeared (0x5698) so we add
it too.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220701152231.529511-2-matthew.d.roper@intel.com
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c
include/drm/i915_pciids.h

index d6d875b..5e51fc2 100644 (file)
@@ -1079,7 +1079,6 @@ static const struct intel_device_info dg2_info = {
        .require_force_probe = 1,
 };
 
-__maybe_unused
 static const struct intel_device_info ats_m_info = {
        DG2_FEATURES,
        .display = { 0 },
@@ -1193,6 +1192,7 @@ static const struct pci_device_id pciidlist[] = {
        INTEL_RPLS_IDS(&adl_s_info),
        INTEL_RPLP_IDS(&adl_p_info),
        INTEL_DG2_IDS(&dg2_info),
+       INTEL_ATS_M_IDS(&ats_m_info),
        {0, 0, 0}
 };
 MODULE_DEVICE_TABLE(pci, pciidlist);
index 7eb8936..f0bf237 100644 (file)
@@ -189,10 +189,12 @@ static const u16 subplatform_rpl_ids[] = {
 
 static const u16 subplatform_g10_ids[] = {
        INTEL_DG2_G10_IDS(0),
+       INTEL_ATS_M150_IDS(0),
 };
 
 static const u16 subplatform_g11_ids[] = {
        INTEL_DG2_G11_IDS(0),
+       INTEL_ATS_M75_IDS(0),
 };
 
 static const u16 subplatform_g12_ids[] = {
index 283dadf..1bd0420 100644 (file)
 #define INTEL_DG2_G10_IDS(info) \
        INTEL_VGA_DEVICE(0x5690, info), \
        INTEL_VGA_DEVICE(0x5691, info), \
-       INTEL_VGA_DEVICE(0x5692, info)
+       INTEL_VGA_DEVICE(0x5692, info), \
+       INTEL_VGA_DEVICE(0x56A0, info), \
+       INTEL_VGA_DEVICE(0x56A1, info), \
+       INTEL_VGA_DEVICE(0x56A2, info)
 
 #define INTEL_DG2_G11_IDS(info) \
        INTEL_VGA_DEVICE(0x5693, info), \
        INTEL_VGA_DEVICE(0x5694, info), \
        INTEL_VGA_DEVICE(0x5695, info), \
-       INTEL_VGA_DEVICE(0x56B0, info)
+       INTEL_VGA_DEVICE(0x5698, info), \
+       INTEL_VGA_DEVICE(0x56A5, info), \
+       INTEL_VGA_DEVICE(0x56A6, info), \
+       INTEL_VGA_DEVICE(0x56B0, info), \
+       INTEL_VGA_DEVICE(0x56B1, info)
 
 #define INTEL_DG2_G12_IDS(info) \
        INTEL_VGA_DEVICE(0x5696, info), \
        INTEL_VGA_DEVICE(0x5697, info), \
-       INTEL_VGA_DEVICE(0x56B2, info)
+       INTEL_VGA_DEVICE(0x56A3, info), \
+       INTEL_VGA_DEVICE(0x56A4, info), \
+       INTEL_VGA_DEVICE(0x56B2, info), \
+       INTEL_VGA_DEVICE(0x56B3, info)
 
 #define INTEL_DG2_IDS(info) \
        INTEL_DG2_G10_IDS(info), \
        INTEL_DG2_G11_IDS(info), \
        INTEL_DG2_G12_IDS(info)
 
+#define INTEL_ATS_M150_IDS(info) \
+       INTEL_VGA_DEVICE(0x56C0, info)
+
+#define INTEL_ATS_M75_IDS(info) \
+       INTEL_VGA_DEVICE(0x56C1, info)
+
+#define INTEL_ATS_M_IDS(info) \
+       INTEL_ATS_M150_IDS(info), \
+       INTEL_ATS_M75_IDS(info)
+
 #endif /* _I915_PCIIDS_H */