b43: support bcma core reset on AC-PHY hardware
authorRafał Miłecki <zajec5@gmail.com>
Sun, 25 Jan 2015 13:39:34 +0000 (14:39 +0100)
committerKalle Valo <kvalo@codeaurora.org>
Thu, 29 Jan 2015 08:54:43 +0000 (10:54 +0200)
AC-PHY hardware includes new control 0x3 bits that need to be set to the
0x1 by default.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/b43/b43.h
drivers/net/wireless/b43/main.c

index 65b2dd8..0365524 100644 (file)
@@ -500,6 +500,8 @@ enum {
 #define  B43_BCMA_IOCTL_PHY_BW_10MHZ   0x00000000      /* 10 MHz bandwidth, 40 MHz PHY */
 #define  B43_BCMA_IOCTL_PHY_BW_20MHZ   0x00000040      /* 20 MHz bandwidth, 80 MHz PHY */
 #define  B43_BCMA_IOCTL_PHY_BW_40MHZ   0x00000080      /* 40 MHz bandwidth, 160 MHz PHY */
+#define  B43_BCMA_IOCTL_PHY_BW_80MHZ   0x000000C0      /* 80 MHz bandwidth */
+#define B43_BCMA_IOCTL_DAC             0x00000300      /* Highspeed DAC mode control field */
 #define B43_BCMA_IOCTL_GMODE           0x00002000      /* G Mode Enable */
 
 /* BCMA 802.11 core specific IO status (BCMA_IOST) flags */
index d1c3971..1784933 100644 (file)
@@ -1262,6 +1262,23 @@ static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode)
                flags |= B43_BCMA_IOCTL_GMODE;
        b43_device_enable(dev, flags);
 
+       if (dev->phy.type == B43_PHYTYPE_AC) {
+               u16 tmp;
+
+               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+               tmp &= ~B43_BCMA_IOCTL_DAC;
+               tmp |= 0x100;
+               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+
+               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+               tmp &= ~B43_BCMA_IOCTL_PHY_CLKEN;
+               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+
+               tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+               tmp |= B43_BCMA_IOCTL_PHY_CLKEN;
+               bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+       }
+
        bcma_core_set_clockmode(dev->dev->bdev, BCMA_CLKMODE_FAST);
        b43_bcma_phy_reset(dev);
        bcma_core_pll_ctl(dev->dev->bdev, req, status, true);