struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
struct exynos_adc_priv *priv = dev_get_priv(dev);
- priv->regs = (struct exynos_adc_v2 *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
if (priv->regs == (struct exynos_adc_v2 *)FDT_ADDR_T_NONE) {
pr_err("Dev: %s - can't get address!", dev->name);
return -ENODATA;
u32 cpg_mode;
int ret;
- priv->base = (struct gen2_base *)devfdt_get_addr(dev);
+ priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
u32 cpg_mode;
int ret;
- priv->base = (struct gen3_base *)devfdt_get_addr(dev);
+ priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
int node = dev_of_offset(dev);
int ret;
- priv->regs = (void __iomem *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
uc_priv->bank_name = dev->name;
ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct mvebu_gpio_priv *priv = dev_get_priv(dev);
- priv->regs = (struct mvebu_gpio_regs *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
uc_priv->gpio_count = MVEBU_GPIOS_PER_BANK;
priv->name[0] = 'A' + dev->req_seq;
uc_priv->bank_name = priv->name;
if (plat)
return 0;
- base = (struct s5p_gpio_bank *)devfdt_get_addr(parent);
+ base = dev_read_addr_ptr(parent);
for (node = fdt_first_subnode(blob, dev_of_offset(parent)), bank = base;
node > 0;
node = fdt_next_subnode(blob, node), bank++) {
if (plat)
return 0;
- ctlr = (struct sunxi_gpio_reg *)devfdt_get_addr(parent);
+ ctlr = dev_read_addr_ptr(parent);
for (bank = 0; bank < soc_data->no_banks; bank++) {
struct sunxi_gpio_platdata *plat;
struct udevice *dev;
struct at91_i2c_bus *bus = dev_get_priv(dev);
int node = dev_of_offset(dev);
- bus->regs = (struct at91_i2c_regs *)devfdt_get_addr(dev);
+ bus->regs = dev_read_addr_ptr(dev);
bus->pdata = (struct at91_i2c_pdata *)dev_get_driver_data(dev);
bus->clock_frequency = fdtdec_get_int(blob, node,
"clock-frequency", 100000);
struct i2c_bus *i2c_bus = dev_get_priv(dev);
i2c_bus->id = dev->seq;
- i2c_bus->regs = (struct i2c_regs *)devfdt_get_addr(dev);
+ i2c_bus->regs = dev_read_addr_ptr(dev);
i2c_bus->speed = 100000;
_davinci_i2c_init(i2c_bus->regs, i2c_bus->speed, 0);
node = dev_of_offset(dev);
- i2c_bus->hsregs = (struct exynos5_hsi2c *)devfdt_get_addr(dev);
+ i2c_bus->hsregs = dev_read_addr_ptr(dev);
i2c_bus->id = pinmux_decode_periph_id(blob, node);
node = dev_of_offset(dev);
- i2c_bus->regs = (struct s3c24x0_i2c *)devfdt_get_addr(dev);
+ i2c_bus->regs = dev_read_addr_ptr(dev);
i2c_bus->id = pinmux_decode_periph_id(blob, node);
struct input_config *input = &uc_priv->input;
int ret;
- priv->kbc = (struct kbc_tegra *)devfdt_get_addr(dev);
+ priv->kbc = dev_read_addr_ptr(dev);
if ((fdt_addr_t)priv->kbc == FDT_ADDR_T_NONE) {
debug("%s: No keyboard register found\n", __func__);
return -EINVAL;
goto free;
host->name = dev->name;
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
max_clk = clk_get_rate(&clk);
if (IS_ERR_VALUE(max_clk)) {
return ret;
host->name = dev->name;
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
struct ftsdc_priv *priv = dev_get_priv(dev);
struct ftsdc010_chip *chip = &priv->chip;
chip->name = dev->name;
- chip->ioaddr = (void *)devfdt_get_addr(dev);
+ chip->ioaddr = dev_read_addr_ptr(dev);
chip->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"bus-width", 4);
chip->priv = dev;
struct dwmci_host *host = &priv->host;
host->name = dev->name;
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"bus-width", 4);
iproc_host->shadow_blk = 0;
host->name = dev->name;
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
host->voltages = MMC_VDD_165_195 |
MMC_VDD_32_33 | MMC_VDD_33_34;
host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B;
int node = dev_of_offset(dev);
host->name = strdup(dev->name);
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
host->bus_width = fdtdec_get_int(gd->fdt_blob, node, "bus-width", 4);
host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0);
priv->base = (void *)fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
int ret;
host->name = MVSDH_NAME;
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
host->quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD;
host->mmc = &plat->mmc;
host->mmc->dev = dev;
}
host->name = dev->name;
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"bus-width", 4);
host->clksel = socfpga_dwmci_clksel;
struct sdhci_host *host = dev_get_priv(dev);
host->name = strdup(dev->name);
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"bus-width", 4);
const char *name;
host->name = dev->name;
- host->ioaddr = (void *)devfdt_get_addr(dev);
+ host->ioaddr = dev_read_addr_ptr(dev);
if (device_is_compatible(dev, "marvell,armada-3700-sdhci"))
priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1);
{
struct cdns_pcie *pdata = dev_get_priv(dev);
- pdata->reg_base = (void __iomem *)devfdt_get_addr(dev);
+ pdata->reg_base = dev_read_addr_ptr(dev);
if (!pdata->reg_base)
return -ENOMEM;
info->data = (struct armada_37xx_pin_data *)dev_get_driver_data(dev);
pin_data = info->data;
- info->base = (void __iomem *)devfdt_get_addr(dev);
+ info->base = dev_read_addr_ptr(dev);
if (!info->base) {
pr_err("unable to find regmap\n");
return -ENODEV;
{
struct exynos_pwm_priv *priv = dev_get_priv(dev);
- priv->regs = (struct s5p_timer *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
return 0;
}
{
struct imx_pwm_priv *priv = dev_get_priv(dev);
- priv->regs = (struct pwm_regs *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
return 0;
}
int i;
priv->soc = (struct mtk_pwm_soc *)dev_get_driver_data(dev);
- priv->base = (void __iomem *)devfdt_get_addr(dev);
+ priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
ret = clk_get_by_name(dev, "top", &priv->top_clk);
{
struct sunxi_pwm_priv *priv = dev_get_priv(dev);
- priv->regs = (struct sunxi_pwm *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
return 0;
}
struct arc_serial_platdata *plat = dev_get_platdata(dev);
DECLARE_GLOBAL_DATA_PTR;
- plat->reg = (struct arc_serial_regs *)devfdt_get_addr(dev);
+ plat->reg = dev_read_addr_ptr(dev);
plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"clock-frequency", 0);
{
struct uartlite_platdata *plat = dev_get_platdata(dev);
- plat->regs = (struct uartlite *)devfdt_get_addr(dev);
+ plat->regs = dev_read_addr_ptr(dev);
return 0;
}
if (ret)
return ret;
- bus_plat->regs = (struct at91_spi *)devfdt_get_addr(bus);
+ bus_plat->regs = dev_read_addr_ptr(bus);
#if CONFIG_IS_ENABLED(DM_GPIO)
struct atmel_spi_priv *priv = dev_get_priv(bus);
{
struct dw_spi_platdata *plat = bus->platdata;
- plat->regs = (struct dw_spi *)devfdt_get_addr(bus);
+ plat->regs = dev_read_addr_ptr(bus);
/* Use 500KHz as a suitable default */
plat->frequency = dev_read_u32_default(bus, "spi-max-frequency",
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
- plat->regs = (struct exynos_spi *)devfdt_get_addr(bus);
+ plat->regs = dev_read_addr_ptr(bus);
plat->periph_id = pinmux_decode_periph_id(blob, node);
if (plat->periph_id == PERIPH_ID_NONE) {
const struct mvebu_spi_dev *drvdata =
(struct mvebu_spi_dev *)dev_get_driver_data(bus);
- plat->spireg = (struct kwspi_registers *)devfdt_get_addr(bus);
+ plat->spireg = dev_read_addr_ptr(bus);
plat->is_errata_50mhz_ac = drvdata->is_errata_50mhz_ac;
return 0;
struct mtk_snfi_priv *priv = dev_get_priv(bus);
int ret;
- priv->base = (void __iomem *)devfdt_get_addr(bus);
+ priv->base = dev_read_addr_ptr(bus);
if (!priv->base)
return -EINVAL;
struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
int ret;
- plat->spireg = (struct spi_reg *)devfdt_get_addr(bus);
+ plat->spireg = dev_read_addr_ptr(bus);
ret = clk_get_by_index(bus, 0, &plat->clk);
if (ret) {
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
- plat->regs = (struct zynq_spi_regs *)devfdt_get_addr(bus);
+ plat->regs = dev_read_addr_ptr(bus);
/* FIXME: Use 250MHz as a suitable default */
plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
static int ehci_usb_probe(struct udevice *dev)
{
struct usb_platdata *plat = dev_get_platdata(dev);
- struct usb_ehci *ehci = (struct usb_ehci *)devfdt_get_addr(dev);
+ struct usb_ehci *ehci = dev_read_addr_ptr(dev);
struct ehci_mx5_priv_data *priv = dev_get_priv(dev);
enum usb_init_type type = plat->init_type;
struct ehci_hccr *hccr;
static int ehci_usb_phy_mode(struct udevice *dev)
{
struct usb_platdata *plat = dev_get_platdata(dev);
- void *__iomem addr = (void *__iomem)devfdt_get_addr(dev);
+ void *__iomem addr = dev_read_addr_ptr(dev);
void *__iomem phy_ctrl, *__iomem phy_status;
const void *blob = gd->fdt_blob;
int offset = dev_of_offset(dev), phy_off;
static int ehci_usb_probe(struct udevice *dev)
{
struct usb_platdata *plat = dev_get_platdata(dev);
- struct usb_ehci *ehci = (struct usb_ehci *)devfdt_get_addr(dev);
+ struct usb_ehci *ehci = dev_read_addr_ptr(dev);
struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
enum usb_init_type type = plat->init_type;
struct ehci_hccr *hccr;
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
- priv->ehci = (struct omap_ehci *)devfdt_get_addr(dev);
+ priv->ehci = dev_read_addr_ptr(dev);
priv->portnr = dev->seq;
priv->init_type = plat->init_type;
priv->portnr = dev->seq;
- priv->ehci = (struct usb_ehci *)devfdt_get_addr(dev);
+ priv->ehci = dev_read_addr_ptr(dev);
mode = fdt_getprop(dt_blob, node, "dr_mode", NULL);
if (mode) {
if (0 == strcmp(mode, "host")) {
#if CONFIG_IS_ENABLED(DM_USB)
static int ohci_da8xx_probe(struct udevice *dev)
{
- struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+ struct ohci_regs *regs = dev_read_addr_ptr(dev);
struct da8xx_ohci *priv = dev_get_priv(dev);
int i, err, ret, clock_nb;
static int ohci_usb_probe(struct udevice *dev)
{
- struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+ struct ohci_regs *regs = dev_read_addr_ptr(dev);
struct generic_ohci *priv = dev_get_priv(dev);
int i, err, ret, clock_nb, reset_nb;
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
- priv->regs = (struct atmel_hlcd_regs *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
if (!priv->regs) {
debug("%s: No display controller address\n", __func__);
return -EINVAL;
int rgb;
int ret;
- priv->disp = (struct disp_ctlr *)devfdt_get_addr(dev);
+ priv->disp = dev_read_addr_ptr(dev);
if (!priv->disp) {
debug("%s: No display controller address\n", __func__);
return -EINVAL;
{
struct omap3_wdt_priv *priv = dev_get_priv(dev);
- priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
if (!priv->regs)
return -EINVAL;