RyuJIT/ARM32: enable DecomposeLongs phase

diff --git a/src/jit/instr.cpp b/src/jit/instr.cpp
index 7332ba6c7160aa4a3d82d05fa31ca2882aaef563..5cb2ccd6f422fde50200c45c4eb91ffee9fd5e2c 100644 (file)
--- a/src/jit/instr.cpp
+++ b/src/jit/instr.cpp
@@ -2326,7 +2326,7 @@ void CodeGen::inst_RV_TT(instruction ins,
 #if CPU_LOAD_STORE_ARCH
     if (ins == INS_mov)
     {
-#if defined(_TARGET_ARM_)
+#if defined(_TARGET_ARM_) && CPU_LONG_USES_REGPAIR
         if (tree->TypeGet() != TYP_LONG)
         {
             ins = ins_Move_Extend(tree->TypeGet(), (tree->gtFlags & GTF_REG_VAL) != 0);
@@ -2341,7 +2341,7 @@ void CodeGen::inst_RV_TT(instruction ins,
             ins = ins_Move_Extend(TYP_INT,
                                   (tree->gtFlags & GTF_REG_VAL) != 0 && genRegPairHi(tree->gtRegPair) != REG_STK);
         }
-#elif defined(_TARGET_ARM64_)
+#elif defined(_TARGET_ARM_) || defined(_TARGET_ARM64_)
         ins = ins_Move_Extend(tree->TypeGet(), (tree->gtFlags & GTF_REG_VAL) != 0);
 #else
         NYI("CodeGen::inst_RV_TT with INS_mov");
@@ -2485,9 +2485,11 @@ AGAIN:
                 default:
                     regNumber regTmp;
 #ifndef LEGACY_BACKEND
+#if CPU_LONG_USES_REGPAIR
                     if (tree->TypeGet() == TYP_LONG)
                         regTmp = (offs == 0) ? genRegPairLo(tree->gtRegPair) : genRegPairHi(tree->gtRegPair);
                     else
+#endif // CPU_LONG_USES_REGPAIR
                         regTmp = tree->gtRegNum;
 #else  // LEGACY_BACKEND
                     if (varTypeIsFloating(tree))
@@ -2575,6 +2577,7 @@ AGAIN:
             inst_RV_IV(ins, reg, tree->gtIntCon.gtIconVal, emitActualTypeSize(tree->TypeGet()), flags);
             break;
 
+#if CPU_LONG_USES_REGPAIR
         case GT_CNS_LNG:
 
             assert(size == EA_4BYTE || size == EA_8BYTE);
@@ -2609,6 +2612,7 @@ AGAIN:
 
             inst_RV_IV(ins, reg, constVal, size, flags);
             break;
+#endif // CPU_LONG_USES_REGPAIR
 
         case GT_COMMA:
             tree = tree->gtOp.gtOp2;

diff --git a/src/jit/target.h b/src/jit/target.h
index 5b608ddfac9ee0c87e0ef3c7421fe4333e55ed79..cb2609f8f95d8e69712ea0154e6eb4e8858e5cbd 100644 (file)
--- a/src/jit/target.h
+++ b/src/jit/target.h
@@ -1182,7 +1182,11 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits
   // TODO-ARM-CQ: Check for sdiv/udiv at runtime and generate it if available
   #define USE_HELPERS_FOR_INT_DIV  1       // BeagleBoard (ARMv7A) doesn't support SDIV/UDIV
   #define CPU_LOAD_STORE_ARCH      1
+#ifdef LEGACY_BACKEND
   #define CPU_LONG_USES_REGPAIR    1
+#else
+  #define CPU_LONG_USES_REGPAIR    0
+#endif
   #define CPU_HAS_FP_SUPPORT       1
   #define ROUND_FLOAT              0       // Do not round intermed float expression results
   #define CPU_HAS_BYTE_REGS        0
@@ -1424,6 +1428,10 @@ typedef unsigned short regPairNoSmall; // arm: need 12 bits
   #define RBM_INTRET               RBM_R0
   #define REG_LNGRET               REG_PAIR_R0R1
   #define RBM_LNGRET              (RBM_R1|RBM_R0)
+  #define REG_LNGRET_LO            REG_R0
+  #define REG_LNGRET_HI            REG_R1
+  #define RBM_LNGRET_LO            RBM_R0
+  #define RBM_LNGRET_HI            RBM_R1
 
   #define REG_FLOATRET             REG_F0
   #define RBM_FLOATRET             RBM_F0