drm/i915/mtl: Add DP AUX support on TypeC ports

On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have
changed wrt. previous platforms, adjust the code accordingly.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-8-radhakrishna.sripada@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 98bd336..48c375c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -637,6 +637,46 @@ static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index)
        }
 }
 
+static i915_reg_t xelpdp_aux_ctl_reg(struct intel_dp *intel_dp)
+{
+       struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+       struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+       enum aux_ch aux_ch = dig_port->aux_ch;
+
+       switch (aux_ch) {
+       case AUX_CH_A:
+       case AUX_CH_B:
+       case AUX_CH_USBC1:
+       case AUX_CH_USBC2:
+       case AUX_CH_USBC3:
+       case AUX_CH_USBC4:
+               return XELPDP_DP_AUX_CH_CTL(aux_ch);
+       default:
+               MISSING_CASE(aux_ch);
+               return XELPDP_DP_AUX_CH_CTL(AUX_CH_A);
+       }
+}
+
+static i915_reg_t xelpdp_aux_data_reg(struct intel_dp *intel_dp, int index)
+{
+       struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+       struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+       enum aux_ch aux_ch = dig_port->aux_ch;
+
+       switch (aux_ch) {
+       case AUX_CH_A:
+       case AUX_CH_B:
+       case AUX_CH_USBC1:
+       case AUX_CH_USBC2:
+       case AUX_CH_USBC3:
+       case AUX_CH_USBC4:
+               return XELPDP_DP_AUX_CH_DATA(aux_ch, index);
+       default:
+               MISSING_CASE(aux_ch);
+               return XELPDP_DP_AUX_CH_DATA(AUX_CH_A, index);
+       }
+}
+
 void intel_dp_aux_fini(struct intel_dp *intel_dp)
 {
        if (cpu_latency_qos_request_active(&intel_dp->pm_qos))
@@ -652,7 +692,10 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
        struct intel_encoder *encoder = &dig_port->base;
        enum aux_ch aux_ch = dig_port->aux_ch;
 
-       if (DISPLAY_VER(dev_priv) >= 12) {
+       if (DISPLAY_VER(dev_priv) >= 14) {
+               intel_dp->aux_ch_ctl_reg = xelpdp_aux_ctl_reg;
+               intel_dp->aux_ch_data_reg = xelpdp_aux_data_reg;
+       } else if (DISPLAY_VER(dev_priv) >= 12) {
                intel_dp->aux_ch_ctl_reg = tgl_aux_ctl_reg;
                intel_dp->aux_ch_data_reg = tgl_aux_data_reg;
        } else if (DISPLAY_VER(dev_priv) >= 9) {

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2cb3109..07c80a6 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3465,6 +3465,20 @@
                                                       _XELPDP_USBC3_AUX_CH_CTL, \
                                                       _XELPDP_USBC4_AUX_CH_CTL))
 
+#define _XELPDP_USBC1_AUX_CH_DATA1      0x16F214
+#define _XELPDP_USBC2_AUX_CH_DATA1      0x16F414
+#define _XELPDP_USBC3_AUX_CH_DATA1      0x16F614
+#define _XELPDP_USBC4_AUX_CH_DATA1      0x16F814
+
+#define XELPDP_DP_AUX_CH_DATA(aux_ch, i)       _MMIO(_PICK(aux_ch, \
+                                                      _DPA_AUX_CH_DATA1, \
+                                                      _DPB_AUX_CH_DATA1, \
+                                                      0, /* port/aux_ch C is non-existent */ \
+                                                      _XELPDP_USBC1_AUX_CH_DATA1, \
+                                                      _XELPDP_USBC2_AUX_CH_DATA1, \
+                                                      _XELPDP_USBC3_AUX_CH_DATA1, \
+                                                      _XELPDP_USBC4_AUX_CH_DATA1) + (i) * 4)
+
 #define   DP_AUX_CH_CTL_SEND_BUSY          (1 << 31)
 #define   DP_AUX_CH_CTL_DONE               (1 << 30)
 #define   DP_AUX_CH_CTL_INTERRUPT          (1 << 29)