[InstCombine] add tests with extra uses for add+xor transform; NFC

diff --git a/llvm/test/Transforms/InstCombine/signext.ll b/llvm/test/Transforms/InstCombine/signext.ll
index f8aa7c9..64eea3e 100644 (file)
--- a/llvm/test/Transforms/InstCombine/signext.ll
+++ b/llvm/test/Transforms/InstCombine/signext.ll
@@ -3,6 +3,8 @@
 
 target datalayout = "n8:16:32:64"
 
+declare void @use(i32)
+
 define i32 @sextinreg(i32 %x) {
 ; CHECK-LABEL: @sextinreg(
 ; CHECK-NEXT:    [[SEXT:%.*]] = shl i32 [[X:%.*]], 16
@@ -15,6 +17,22 @@ define i32 @sextinreg(i32 %x) {
   ret i32 %t3
 }
 
+define i32 @sextinreg_extra_use(i32 %x) {
+; CHECK-LABEL: @sextinreg_extra_use(
+; CHECK-NEXT:    [[T1:%.*]] = and i32 [[X:%.*]], 65535
+; CHECK-NEXT:    [[T2:%.*]] = xor i32 [[T1]], -32768
+; CHECK-NEXT:    call void @use(i32 [[T2]])
+; CHECK-NEXT:    [[SEXT:%.*]] = shl i32 [[X]], 16
+; CHECK-NEXT:    [[T3:%.*]] = ashr exact i32 [[SEXT]], 16
+; CHECK-NEXT:    ret i32 [[T3]]
+;
+  %t1 = and i32 %x, 65535
+  %t2 = xor i32 %t1, -32768
+  call void @use(i32 %t2)
+  %t3 = add i32 %t2, 32768
+  ret i32 %t3
+}
+
 define <2 x i32> @sextinreg_splat(<2 x i32> %x) {
 ; CHECK-LABEL: @sextinreg_splat(
 ; CHECK-NEXT:    [[T1:%.*]] = and <2 x i32> [[X:%.*]], <i32 65535, i32 65535>
@@ -64,6 +82,21 @@ define i32 @sext(i16 %P) {
   ret i32 %t5
 }
 
+define i32 @sext_extra_use(i16 %P) {
+; CHECK-LABEL: @sext_extra_use(
+; CHECK-NEXT:    [[TMP1:%.*]] = xor i16 [[P:%.*]], -32768
+; CHECK-NEXT:    [[T4:%.*]] = zext i16 [[TMP1]] to i32
+; CHECK-NEXT:    call void @use(i32 [[T4]])
+; CHECK-NEXT:    [[T5:%.*]] = sext i16 [[P]] to i32
+; CHECK-NEXT:    ret i32 [[T5]]
+;
+  %t1 = zext i16 %P to i32
+  %t4 = xor i32 %t1, 32768
+  call void @use(i32 %t4)
+  %t5 = add i32 %t4, -32768
+  ret i32 %t5
+}
+
 define <2 x i32> @sext_splat(<2 x i16> %P) {
 ; CHECK-LABEL: @sext_splat(
 ; CHECK-NEXT:    [[T5:%.*]] = sext <2 x i16> [[P:%.*]] to <2 x i32>