u32 end_tag;
};
+struct msg_set_sdhost_clock {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock;
+ u32 end_tag;
+};
+
struct msg_query {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_physical_w_h physical_w_h;
return clock_rate;
}
+int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1);
+ int ret;
+
+ BCM2835_MBOX_INIT_HDR(msg_sdhost_clk);
+ BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK);
+
+ msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz;
+
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr);
+ if (ret) {
+ printf("bcm2835: Could not query sdhost clock rate\n");
+ return -EIO;
+ }
+
+ *rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1;
+ *rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2;
+
+ return 0;
+}
+
int bcm2835_get_video_size(int *widthp, int *heightp)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
struct udevice *dev;
struct mmc *mmc;
struct bcm2835_plat *plat;
+ unsigned int firmware_sets_cdiv:1;
};
static void bcm2835_dumpregs(struct bcm2835_host *host)
msleep(20);
host->clock = 0;
writel(host->hcfg, host->ioaddr + SDHCFG);
- writel(host->cdiv, host->ioaddr + SDCDIV);
+ writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV);
}
static int bcm2835_wait_transfer_complete(struct bcm2835_host *host)
static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
{
int div;
+ u32 clock_rate[2] = { 0 };
/* The SDCDIV register has 11 bits, and holds (div - 2). But
* in data mode the max is 50MHz wihout a minimum, and only
* clock divisor at all times.
*/
- if (clock < 100000) {
- /* Can't stop the clock, but make it as slow as possible
- * to show willing
- */
- host->cdiv = SDCDIV_MAX_CDIV;
- writel(host->cdiv, host->ioaddr + SDCDIV);
- return;
- }
+ if (host->firmware_sets_cdiv) {
+ bcm2835_set_sdhost_clock(clock, &clock_rate[0], &clock_rate[1]);
+ clock = max(clock_rate[0], clock_rate[1]);
+ } else {
+ if (clock < 100000) {
+ /* Can't stop the clock, but make it as slow as possible
+ * to show willing
+ */
+ host->cdiv = SDCDIV_MAX_CDIV;
+ writel(host->cdiv, host->ioaddr + SDCDIV);
+ return;
+ }
- div = host->max_clk / clock;
- if (div < 2)
- div = 2;
- if ((host->max_clk / div) > clock)
- div++;
- div -= 2;
+ div = host->max_clk / clock;
+ if (div < 2)
+ div = 2;
+ if ((host->max_clk / div) > clock)
+ div++;
+ div -= 2;
- if (div > SDCDIV_MAX_CDIV)
- div = SDCDIV_MAX_CDIV;
+ if (div > SDCDIV_MAX_CDIV)
+ div = SDCDIV_MAX_CDIV;
+
+ clock = host->max_clk / (div + 2);
+ host->cdiv = div;
+ writel(host->cdiv, host->ioaddr + SDCDIV);
+ }
- clock = host->max_clk / (div + 2);
host->mmc->clock = clock;
/* Calibrate some delays */
host->ns_per_fifo_word = (1000000000 / clock) *
((host->mmc->card_caps & MMC_MODE_4BIT) ? 8 : 32);
- host->cdiv = div;
- writel(host->cdiv, host->ioaddr + SDCDIV);
-
/* Set the timeout to 500ms */
writel(host->mmc->clock / 2, host->ioaddr + SDTOUT);
}
struct bcm2835_host *host = dev_get_priv(dev);
struct mmc *mmc = mmc_get_mmc_dev(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ u32 clock_rate[2] = { ~0 };
host->dev = dev;
host->mmc = mmc;
host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE);
+ bcm2835_set_sdhost_clock(0, &clock_rate[0], &clock_rate[1]);
+ host->firmware_sets_cdiv = (clock_rate[0] != ~0);
+
bcm2835_add_host(host);
dev_dbg(dev, "%s -> OK\n", __func__);