combine.c (simplify_comparison): Re-canonicalize operands where appropriate.

2013-07-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
            Richard Earnshaw  <richard.earnshaw@arm.com>

	* combine.c (simplify_comparison): Re-canonicalize operands
	where appropriate.
	* config/arm/arm.md (movcond_addsi): New splitter.

Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
From-SVN: r201260

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7bcc02d..f3fabaa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2013-07-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+            Richard Earnshaw  <richard.earnshaw@arm.com>
+
+       * combine.c (simplify_comparison): Re-canonicalize operands
+       where appropriate.      
+       * config/arm/arm.md (movcond_addsi): New splitter.
+
 2013-07-25  Sterling Augustine  <saugustine@google.com>
 
        * dwarf2out.c (size_of_pubnames): Move code to...

diff --git a/gcc/combine.c b/gcc/combine.c
index fc94c68..754cd34 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11990,6 +11990,13 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
            }
        }
 
+  /* We may have changed the comparison operands.  Re-canonicalize.  */
+  if (swap_commutative_operands_p (op0, op1))
+    {
+      tem = op0, op0 = op1, op1 = tem;
+      code = swap_condition (code);
+    }
+
   /* If this machine only supports a subset of valid comparisons, see if we
      can convert an unsupported one into a supported one.  */
   target_canonicalize_comparison (&code, &op0, &op1, 0);

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index a17d823..fceb04c 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -11112,6 +11112,44 @@
    (set_attr "length" "12")]
 )
 
+(define_insn_and_split "movcond_addsi"
+  [(set (match_operand:SI 0 "s_register_operand" "=r,l,r")
+       (if_then_else:SI
+        (match_operator 5 "comparison_operator"
+         [(plus:SI (match_operand:SI 3 "s_register_operand" "r,r,r")
+                   (match_operand:SI 4 "arm_add_operand" "rIL,rIL,rIL"))
+            (const_int 0)])
+        (match_operand:SI 1 "arm_rhs_operand" "rI,rPy,r")
+        (match_operand:SI 2 "arm_rhs_operand" "rI,rPy,r")))
+   (clobber (reg:CC CC_REGNUM))]
+   "TARGET_32BIT"
+   "#"
+   "&& reload_completed"
+  [(set (reg:CC_NOOV CC_REGNUM)
+       (compare:CC_NOOV
+        (plus:SI (match_dup 3)
+                 (match_dup 4))
+        (const_int 0)))
+   (set (match_dup 0) (match_dup 1))
+   (cond_exec (match_dup 6)
+             (set (match_dup 0) (match_dup 2)))]
+  "
+  {
+    enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[5]),
+                                            operands[3], operands[4]);
+    enum rtx_code rc = GET_CODE (operands[5]);
+
+    operands[6] = gen_rtx_REG (mode, CC_REGNUM);
+    gcc_assert (!(mode == CCFPmode || mode == CCFPEmode));
+    rc = reverse_condition (rc);
+
+    operands[6] = gen_rtx_fmt_ee (rc, VOIDmode, operands[6], const0_rtx);
+  }
+  "
+  [(set_attr "conds" "clob")
+   (set_attr "enabled_for_depr_it" "no,yes,yes")]
+)
+
 (define_insn "movcond"
   [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
        (if_then_else:SI