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global: Migrate CONFIG_SH_ETHER_PHY_MODE to CFG
authorTom Rini <trini@konsulko.com>
Sun, 4 Dec 2022 15:13:51 +0000 (10:13 -0500)
committerTom Rini <trini@konsulko.com>
Fri, 23 Dec 2022 15:15:12 +0000 (10:15 -0500)
Perform a simple rename of CONFIG_SH_ETHER_PHY_MODE to CFG_SH_ETHER_PHY_MODE

Signed-off-by: Tom Rini <trini@konsulko.com>
include/configs/alt.h patch | blob | history
include/configs/condor.h patch | blob | history
include/configs/gose.h patch | blob | history
include/configs/grpeach.h patch | blob | history
include/configs/koelsch.h patch | blob | history
include/configs/lager.h patch | blob | history
include/configs/porter.h patch | blob | history
include/configs/silk.h patch | blob | history
include/configs/stout.h patch | blob | history

diff --git a/include/configs/alt.h b/include/configs/alt.h
index 06ab5ce..53c3156 100644 (file)
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -23,7 +23,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/condor.h b/include/configs/condor.h
index 43b88f1..2c9817c 100644 (file)
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -16,7 +16,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 5184db4..ed7dd70 100644 (file)
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -22,7 +22,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 8ba9b73..6a11aa6 100644 (file)
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -19,7 +19,7 @@
 /* Network interface */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 2910336..31d0795 100644 (file)
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -22,7 +22,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 815239a..991fc90 100644 (file)
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -23,7 +23,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/porter.h b/include/configs/porter.h
index f732aeb..1587c5c 100644 (file)
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -24,7 +24,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 005eed1..21100c4 100644 (file)
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -24,7 +24,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
diff --git a/include/configs/stout.h b/include/configs/stout.h
index cf90e4d..51f4420 100644 (file)
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -28,7 +28,7 @@
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CFG_SH_ETHER_PHY_ADDR  0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE       64
Domain: System / Kernel;