-@c Copyright (c) 2004, 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
+@c Copyright (c) 2004, 2005, 2007, 2008, 2010, 2012 Free Software Foundation, Inc.
@c Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
not matter. The type of the operands and that of the result are
always of @code{BOOLEAN_TYPE} or @code{INTEGER_TYPE}.
-@itemx POINTER_PLUS_EXPR
+@item POINTER_PLUS_EXPR
This node represents pointer arithmetic. The first operand is always
a pointer/reference type. The second operand is always an unsigned
integer type compatible with sizetype. This is the only binary
arithmetic operand that can operate on pointer types.
-@itemx PLUS_EXPR
+@item PLUS_EXPR
@itemx MINUS_EXPR
@itemx MULT_EXPR
These nodes represent various binary arithmetic operations.
this will become the default. The name @samp{gnu9x} is deprecated.
@item gnu11
-@item gnu1x
+@itemx gnu1x
GNU dialect of ISO C11. Support is incomplete and experimental. The
name @samp{gnu1x} is deprecated.
For example, with @option{-fdbg-cnt=dce:10,tail_call:0},
@code{dbg_cnt(dce)} returns true only for first 10 invocations.
-@itemx -fenable-@var{kind}-@var{pass}
+@item -fenable-@var{kind}-@var{pass}
@itemx -fdisable-@var{kind}-@var{pass}=@var{range-list}
@opindex fdisable-
@opindex fenable-
@option{-fdump-rtl-ce3} enable dumping after the three
if conversion passes.
-@itemx -fdump-rtl-cprop_hardreg
+@item -fdump-rtl-cprop_hardreg
@opindex fdump-rtl-cprop_hardreg
Dump after hard register copy propagation.
-@itemx -fdump-rtl-csa
+@item -fdump-rtl-csa
@opindex fdump-rtl-csa
Dump after combining stack adjustments.
@option{-fdump-rtl-cse1} and @option{-fdump-rtl-cse2} enable dumping after
the two common subexpression elimination passes.
-@itemx -fdump-rtl-dce
+@item -fdump-rtl-dce
@opindex fdump-rtl-dce
Dump after the standalone dead code elimination passes.
-@itemx -fdump-rtl-dbr
+@item -fdump-rtl-dbr
@opindex fdump-rtl-dbr
Dump after delayed branch scheduling.
@opindex fdump-rtl-initvals
Dump after the computation of the initial value sets.
-@itemx -fdump-rtl-into_cfglayout
+@item -fdump-rtl-into_cfglayout
@opindex fdump-rtl-into_cfglayout
Dump after converting to cfglayout mode.
@opindex fdump-rtl-rnreg
Dump after register renumbering.
-@itemx -fdump-rtl-outof_cfglayout
+@item -fdump-rtl-outof_cfglayout
@opindex fdump-rtl-outof_cfglayout
Dump after converting from cfglayout mode.
The default is @option{-mfp-mode=caller}
@item -mnosplit-lohi
+@itemx -mno-postinc
+@itemx -mno-postmodify
@opindex mnosplit-lohi
-@item -mno-postinc
@opindex mno-postinc
-@item -mno-postmodify
@opindex mno-postmodify
Code generation tweaks that disable, respectively, splitting of 32-bit
loads, generation of post-increment addresses, and generation of
Do not assume that unaligned memory references will be handled by the system.
@item -momit-leaf-frame-pointer
-@item -mno-omit-leaf-frame-pointer
+@itemx -mno-omit-leaf-frame-pointer
@opindex momit-leaf-frame-pointer
@opindex mno-omit-leaf-frame-pointer
Omit or keep the frame pointer in leaf functions. The former behaviour is the
memory.
@item __AVR_HAVE_EIJMP_EICALL__
-@item __AVR_3_BYTE_PC__
+@itemx __AVR_3_BYTE_PC__
The device has the @code{EIJMP} and @code{EICALL} instructions.
This is the case for devices with more than 128@tie{}KiB of program memory.
This also means that the program counter
with up to 128@tie{}KiB of program memory.
@item __AVR_HAVE_8BIT_SP__
-@item __AVR_HAVE_16BIT_SP__
+@itemx __AVR_HAVE_16BIT_SP__
The stack pointer (SP) register is treated as 8-bit respectively
16-bit register by the compiler.
The definition of these macros is affected by @code{-mtiny-stack}.
@item __AVR_HAVE_SPH__
-@item __AVR_SP8__
+@itemx __AVR_SP8__
The device has the SPH (high part of stack pointer) special function
register or has an 8-bit stack pointer, respectively.
The definition of these macros is affected by @code{-mmcu=} and
by @code{-msp8}.
@item __AVR_HAVE_RAMPD__
-@item __AVR_HAVE_RAMPX__
-@item __AVR_HAVE_RAMPY__
-@item __AVR_HAVE_RAMPZ__
+@itemx __AVR_HAVE_RAMPX__
+@itemx __AVR_HAVE_RAMPY__
+@itemx __AVR_HAVE_RAMPZ__
The device has the @code{RAMPD}, @code{RAMPX}, @code{RAMPY},
@code{RAMPZ} special function register, respectively.
This macro reflects the @code{-mno-interrupts} command line option.
@item __AVR_ERRATA_SKIP__
-@item __AVR_ERRATA_SKIP_JMP_CALL__
+@itemx __AVR_ERRATA_SKIP_JMP_CALL__
Some AVR devices (AT90S8515, ATmega103) must not skip 32-bit
instructions because of a hardware erratum. Skip instructions are
@code{SBRS}, @code{SBRC}, @code{SBIS}, @code{SBIC} and @code{CPSE}.
@option{-mhitachi} is given.
@item -mieee
-@item -mno-ieee
+@itemx -mno-ieee
@opindex mieee
@opindex mnoieee
Control the IEEE compliance of floating-point comparisons, which affects the
@cindex @code{ior@var{m}3} instruction pattern
@cindex @code{xor@var{m}3} instruction pattern
@item @samp{ssadd@var{m}3}, @samp{usadd@var{m}3}
-@item @samp{sub@var{m}3}, @samp{sssub@var{m}3}, @samp{ussub@var{m}3}
-@item @samp{mul@var{m}3}, @samp{ssmul@var{m}3}, @samp{usmul@var{m}3}
+@itemx @samp{sub@var{m}3}, @samp{sssub@var{m}3}, @samp{ussub@var{m}3}
+@itemx @samp{mul@var{m}3}, @samp{ssmul@var{m}3}, @samp{usmul@var{m}3}
@itemx @samp{div@var{m}3}, @samp{ssdiv@var{m}3}
@itemx @samp{udiv@var{m}3}, @samp{usdiv@var{m}3}
@itemx @samp{mod@var{m}3}, @samp{umod@var{m}3}