ret i32 %r
}
+define i32 @ctlz_lshr_negative(i32 %x) {
+; CHECK-LABEL: @ctlz_lshr_negative(
+; CHECK-NEXT: [[S:%.*]] = lshr i32 -42, [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 true)
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %s = lshr i32 -42, %x
+ %r = call i32 @llvm.ctlz.i32(i32 %s, i1 true)
+ ret i32 %r
+}
+
define <3 x i33> @ctlz_lshr_sign_bit_vec(<3 x i33> %x) {
; CHECK-LABEL: @ctlz_lshr_sign_bit_vec(
; CHECK-NEXT: ret <3 x i33> [[X:%.*]]
ret i32 %r
}
+define i32 @ctlz_ashr_negative(i32 %x) {
+; CHECK-LABEL: @ctlz_ashr_negative(
+; CHECK-NEXT: [[S:%.*]] = ashr i32 -42, [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 false)
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %s = ashr i32 -42, %x
+ %r = call i32 @llvm.ctlz.i32(i32 %s, i1 false)
+ ret i32 %r
+}
+
define <3 x i33> @ctlz_ashr_sign_bit_vec(<3 x i33> %x) {
; CHECK-LABEL: @ctlz_ashr_sign_bit_vec(
; CHECK-NEXT: [[S:%.*]] = ashr <3 x i33> <i33 -4294967296, i33 undef, i33 -4294967296>, [[X:%.*]]