riscv::starfive:driver:dc8200
authorkeith.zhao <keith.zhao@starfivetech.com>
Fri, 14 Jan 2022 12:58:47 +0000 (20:58 +0800)
committerkeith.zhao <keith.zhao@starfivetech.com>
Fri, 14 Jan 2022 12:58:47 +0000 (20:58 +0800)
add head file vs-drm.h

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>

include/uapi/drm/vs_drm.h [new file with mode: 0755]

diff --git a/include/uapi/drm/vs_drm.h b/include/uapi/drm/vs_drm.h
new file mode 100755 (executable)
index 0000000..47e8ee0
--- /dev/null
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 VeriSilicon Holdings Co., Ltd.
+ */
+
+#ifndef __VS_DRM_H__
+#define __VS_DRM_H__
+
+#include "drm.h"
+
+enum drm_vs_degamma_mode {
+    VS_DEGAMMA_DISABLE = 0,
+    VS_DEGAMMA_BT709 = 1,
+    VS_DEGAMMA_BT2020 = 2,
+};
+
+enum drm_vs_sync_dc_mode {
+    VS_SINGLE_DC = 0,
+    VS_MULTI_DC_PRIMARY = 1,
+    VS_MULTI_DC_SECONDARY = 2,
+};
+
+enum drm_vs_mmu_prefetch_mode {
+    VS_MMU_PREFETCH_DISABLE = 0,
+    VS_MMU_PREFETCH_ENABLE = 1,
+};
+
+struct drm_vs_watermark {
+    __u32 watermark;
+    __u8 qos_low;
+    __u8 qos_high;
+};
+
+struct drm_vs_color_mgmt {
+    __u32 colorkey;
+    __u32 colorkey_high;
+    __u32 clear_value;
+    bool  clear_enable;
+    bool  transparency;
+};
+
+struct drm_vs_roi {
+    bool enable;
+    __u16 roi_x;
+    __u16 roi_y;
+    __u16 roi_w;
+    __u16 roi_h;
+};
+
+#endif /* __VS_DRM_H__ */