| T_OP_ATOMIC_B_AND { new_instr(OPC_ATOMIC_AND)->flags |= IR3_INSTR_G; dummy_dst(); }
| T_OP_ATOMIC_B_OR { new_instr(OPC_ATOMIC_OR)->flags |= IR3_INSTR_G; dummy_dst(); }
| T_OP_ATOMIC_B_XOR { new_instr(OPC_ATOMIC_XOR)->flags |= IR3_INSTR_G; dummy_dst(); }
+| T_OP_LDIB_B { new_instr(OPC_LDIB); }
+| T_OP_STIB_B { new_instr(OPC_STIB); dummy_dst(); }
cat6_bindless_ibo: cat6_bindless_ibo_opc_1src cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode dst_reg ',' cat6_reg_or_immed
| cat6_bindless_ibo_opc_2src cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode dst_reg ',' cat6_reg_or_immed ',' cat6_reg_or_immed {
/* TODO cleanup ir3 src order: */
- swap(instr->regs[1], instr->regs[3]);
+ if (is_atomic(instr->opc)) {
+ swap(instr->regs[1], instr->regs[3]);
+ } else if (instr->opc == OPC_LDIB) {
+ swap(instr->regs[1], instr->regs[2]);
+ } else if (instr->opc == OPC_STIB) {
+ swap(instr->regs[1], instr->regs[3]);
+ }
}
cat6_bindless_ldc_opc: T_OP_LDC { new_instr(OPC_LDC); }
/* INSTR_6XX(c7060020_03800000, "stc c[32], r0.x, 3"), */
/* dEQP-VK.image.image_size.cube_array.readonly_writeonly_1x1x12 */
- INSTR_6XX(c0260200_03676100, "stib.b.untyped.1d.u32.3.imm.base0 r0.x, r0.w, 1", .parse_fail=true), /* stib.untyped.u32.1d.3.mode4.base0 r0.x, r0.w, 1 */
+ INSTR_6XX(c0260200_03676100, "stib.b.untyped.1d.u32.3.imm.base0 r0.x, r0.w, 1"), /* stib.untyped.u32.1d.3.mode4.base0 r0.x, r0.w, 1 */
+#if 0
+ /* TODO blob sometimes/frequently sets b0, although there does not seem
+ * to be an obvious pattern and our encoding never sets it. AFAICT it
+ * is a dontcare bit
+ */
/* dEQP-VK.texture.filtering.cube.formats.a8b8g8r8_srgb_nearest_mipmap_nearest.txt */
- INSTR_6XX(c0220200_0361b801, "ldib.b.typed.1d.f32.4.imm r0.x, r0.w, 1", .parse_fail=true), /* ldib.f32.1d.4.mode0.base0 r0.x, r0.w, 1 */
+ INSTR_6XX(c0220200_0361b801, "ldib.b.typed.1d.f32.4.imm r0.x, r0.w, 1"), /* ldib.f32.1d.4.mode0.base0 r0.x, r0.w, 1 */
+#else
+ /* dEQP-VK.texture.filtering.cube.formats.a8b8g8r8_srgb_nearest_mipmap_nearest.txt */
+ INSTR_6XX(c0220200_0361b800, "ldib.b.typed.1d.f32.4.imm r0.x, r0.w, 1"), /* ldib.f32.1d.4.mode0.base0 r0.x, r0.w, 1 */
+#endif
/* dEQP-GLES31.functional.tessellation.invariance.outer_edge_symmetry.isolines_equal_spacing_ccw */
INSTR_6XX(c2c21100_04800006, "stlw.f32 l[r2.x], r0.w, 4"),