ARM: dts: stm32: Enable LVDS panel on i.Core STM32MP1 EDIMM2.2

Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit has plugged with
7" LVDS panel.

Engicam i.Core STM32MP1 SoM has SN65DSI84 DSI to LVDS bridge.

This patch adds a display pipeline to connect DSI to SN65DSI84
to 7" LVDS panel.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts
index ec9f1d1..a797eaa 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts
+++ b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts
@@ -24,6 +24,91 @@
        chosen {
                stdout-path = "serial0:115200n8";
        };
+
+       backlight: backlight {
+               compatible = "gpio-backlight";
+               gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
+               default-on;
+       };
+
+       panel {
+               compatible = "yes-optoelectronics,ytc700tlag-05-201c";
+               backlight = <&backlight>;
+               power-supply = <&v3v3>;
+
+               port {
+                       panel_out_bridge: endpoint {
+                               remote-endpoint = <&bridge_out_panel>;
+                       };
+               };
+       };
+};
+
+&dsi {
+       status = "okay";
+       phy-dsi-supply = <&reg18>;
+
+       ports {
+               port@0 {
+                       reg = <0>;
+                       dsi_in_ltdc: endpoint {
+                               remote-endpoint = <&ltdc_out_dsi>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       dsi_out_bridge: endpoint {
+                               remote-endpoint = <&bridge_in_dsi>;
+                       };
+               };
+       };
+};
+
+&i2c6 {
+       i2c-scl-falling-time-ns = <20>;
+       i2c-scl-rising-time-ns = <185>;
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&i2c6_pins_a>;
+       pinctrl-1 = <&i2c6_sleep_pins_a>;
+       status = "okay";
+
+       bridge@2c {
+               compatible = "ti,sn65dsi84";
+               reg = <0x2c>;
+               enable-gpios = <&gpiof 15 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               bridge_in_dsi: endpoint {
+                                       remote-endpoint = <&dsi_out_bridge>;
+                                       data-lanes = <1 2>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               bridge_out_panel: endpoint {
+                                       remote-endpoint = <&panel_out_bridge>;
+                               };
+                       };
+               };
+       };
+};
+
+&ltdc {
+       status = "okay";
+
+       port {
+               ltdc_out_dsi: endpoint@0 {
+                       reg = <0>;
+                       remote-endpoint = <&dsi_in_ltdc>;
+               };
+       };
 };
 
 &sdmmc1 {