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arm64: tegra: Add FUSE block on Tegra186
author
Thierry Reding
<treding@nvidia.com>
Mon, 26 Jun 2017 15:38:43 +0000
(17:38 +0200)
committer
Thierry Reding
<treding@nvidia.com>
Wed, 13 Dec 2017 12:15:43 +0000
(13:15 +0100)
The FUSE register block found on Tegra186 SoCs encodes various settings,
such as calibration data for other blocks.
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra186.dtsi
patch
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diff --git
a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 11795dbd30f0720f6cca6149cf6adde1762c52f9..c9f4a6dc162c043a33d24a06b763076dfc348535 100644
(file)
--- a/
arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/
arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@
-265,6
+265,13
@@
status = "disabled";
};
+ fuse@3820000 {
+ compatible = "nvidia,tegra186-efuse";
+ reg = <0x0 0x03820000 0x0 0x10000>;
+ clocks = <&bpmp TEGRA186_CLK_FUSE>;
+ clock-names = "fuse";
+ };
+
gic: interrupt-controller@3881000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;