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arm.md (generic_sched): Add cortexa12.
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Mon, 9 Dec 2013 14:38:50 +0000 (14:38 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Mon, 9 Dec 2013 14:38:50 +0000 (14:38 +0000)
2013-12-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.md (generic_sched): Add cortexa12.
(generic_vfp): Likewise.
* config/arm/arm.c (cortexa12_extra_costs): New cost table.
(arm_cortex_a12_tune): New tuning struct.
* config/arm/arm-cores.def: Add cortex-a12.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* config/arm/bpabi.h: Add cortex-a12.
* doc/invoke.texi: Document -mcpu=cortex-a12.

From-SVN: r205804

gcc/ChangeLog patch | blob | history
gcc/config/arm/arm-cores.def patch | blob | history
gcc/config/arm/arm-tables.opt patch | blob | history
gcc/config/arm/arm-tune.md patch | blob | history
gcc/config/arm/arm.c patch | blob | history
gcc/config/arm/arm.md patch | blob | history
gcc/config/arm/bpabi.h patch | blob | history
gcc/doc/invoke.texi patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index da67319..c262942 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2013-12-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/arm/arm.md (generic_sched): Add cortexa12.
+       (generic_vfp): Likewise.
+       * config/arm/arm.c (cortexa12_extra_costs): New cost table.
+       (arm_cortex_a12_tune): New tuning struct.
+       * config/arm/arm-cores.def: Add cortex-a12.
+       * config/arm/arm-tables.opt: Regenerate.
+       * config/arm/arm-tune.md: Likewise.
+       * config/arm/bpabi.h: Add cortex-a12.
+       * doc/invoke.texi: Document -mcpu=cortex-a12.
+
 2013-12-09  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
 
        * doc/install.texi (Prerequisites): Explicitly mention C library
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 119dc33..e7cea63 100644 (file)
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -128,6 +128,7 @@ ARM_CORE("cortex-a5",         cortexa5,     7A,                              FL_LDSCHED, cortex_a5)
 ARM_CORE("cortex-a7",    cortexa7,     7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
 ARM_CORE("cortex-a8",    cortexa8,     7A,                              FL_LDSCHED, cortex)
 ARM_CORE("cortex-a9",    cortexa9,     7A,                              FL_LDSCHED, cortex_a9)
+ARM_CORE("cortex-a12",   cortexa12,    7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
 ARM_CORE("cortex-a15",   cortexa15,    7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
 ARM_CORE("cortex-a53",   cortexa53,    8A,                              FL_LDSCHED, cortex_a53)
 ARM_CORE("cortex-r4",    cortexr4,     7R,                              FL_LDSCHED, cortex)
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index bf20695..b3e7a7c 100644 (file)
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -247,6 +247,9 @@ EnumValue
 Enum(processor_type) String(cortex-a9) Value(cortexa9)
 
 EnumValue
+Enum(processor_type) String(cortex-a12) Value(cortexa12)
+
+EnumValue
 Enum(processor_type) String(cortex-a15) Value(cortexa15)
 
 EnumValue
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index e4da098..e10d0aa 100644 (file)
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from arm-cores.def
 (define_attr "tune"
-       "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexa53,cortexr4,cortexr4f,cortexr5,cortexr7,cortexm4,cortexm3,cortexm1,cortexm0,cortexm0plus,marvell_pj4"
+       "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa12,cortexa15,cortexa53,cortexr4,cortexr4f,cortexr5,cortexr7,cortexm4,cortexm3,cortexm1,cortexm0,cortexm0plus,marvell_pj4"
        (const (symbol_ref "((enum attr_tune) arm_tune)")))
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index b3a81b0..c961fb1 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1164,6 +1164,106 @@ const struct cpu_cost_table cortexa7_extra_costs =
   }
 };
 
+const struct cpu_cost_table cortexa12_extra_costs =
+{
+  /* ALU */
+  {
+    0,                 /* Arith.  */
+    0,                 /* Logical.  */
+    0,                 /* Shift.  */
+    COSTS_N_INSNS (1), /* Shift_reg.  */
+    COSTS_N_INSNS (1), /* Arith_shift.  */
+    COSTS_N_INSNS (1), /* Arith_shift_reg.  */
+    COSTS_N_INSNS (1), /* Log_shift.  */
+    COSTS_N_INSNS (1), /* Log_shift_reg.  */
+    0,                 /* Extend.  */
+    COSTS_N_INSNS (1), /* Extend_arith.  */
+    0,                 /* Bfi.  */
+    COSTS_N_INSNS (1), /* Bfx.  */
+    COSTS_N_INSNS (1), /* Clz.  */
+    0,                 /* non_exec.  */
+    true               /* non_exec_costs_exec.  */
+  },
+  /* MULT SImode */
+  {
+    {
+      COSTS_N_INSNS (2),       /* Simple.  */
+      COSTS_N_INSNS (3),       /* Flag_setting.  */
+      COSTS_N_INSNS (2),       /* Extend.  */
+      COSTS_N_INSNS (3),       /* Add.  */
+      COSTS_N_INSNS (2),       /* Extend_add.  */
+      COSTS_N_INSNS (18)       /* Idiv.  */
+    },
+    /* MULT DImode */
+    {
+      0,                       /* Simple (N/A).  */
+      0,                       /* Flag_setting (N/A).  */
+      COSTS_N_INSNS (3),       /* Extend.  */
+      0,                       /* Add (N/A).  */
+      COSTS_N_INSNS (3),       /* Extend_add.  */
+      0                                /* Idiv (N/A).  */
+    }
+  },
+  /* LD/ST */
+  {
+    COSTS_N_INSNS (3), /* Load.  */
+    COSTS_N_INSNS (3), /* Load_sign_extend.  */
+    COSTS_N_INSNS (3), /* Ldrd.  */
+    COSTS_N_INSNS (3), /* Ldm_1st.  */
+    1,                 /* Ldm_regs_per_insn_1st.  */
+    2,                 /* Ldm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (3), /* Loadf.  */
+    COSTS_N_INSNS (3), /* Loadd.  */
+    0,                 /* Load_unaligned.  */
+    0,                 /* Store.  */
+    0,                 /* Strd.  */
+    0,                 /* Stm_1st.  */
+    1,                 /* Stm_regs_per_insn_1st.  */
+    2,                 /* Stm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (2), /* Storef.  */
+    COSTS_N_INSNS (2), /* Stored.  */
+    0                  /* Store_unaligned.  */
+  },
+  {
+    /* FP SFmode */
+    {
+      COSTS_N_INSNS (17),      /* Div.  */
+      COSTS_N_INSNS (4),       /* Mult.  */
+      COSTS_N_INSNS (8),       /* Mult_addsub. */
+      COSTS_N_INSNS (8),       /* Fma.  */
+      COSTS_N_INSNS (4),       /* Addsub.  */
+      COSTS_N_INSNS (2),       /* Fpconst. */
+      COSTS_N_INSNS (2),       /* Neg.  */
+      COSTS_N_INSNS (2),       /* Compare.  */
+      COSTS_N_INSNS (4),       /* Widen.  */
+      COSTS_N_INSNS (4),       /* Narrow.  */
+      COSTS_N_INSNS (4),       /* Toint.  */
+      COSTS_N_INSNS (4),       /* Fromint.  */
+      COSTS_N_INSNS (4)                /* Roundint.  */
+    },
+    /* FP DFmode */
+    {
+      COSTS_N_INSNS (31),      /* Div.  */
+      COSTS_N_INSNS (4),       /* Mult.  */
+      COSTS_N_INSNS (8),       /* Mult_addsub.  */
+      COSTS_N_INSNS (8),       /* Fma.  */
+      COSTS_N_INSNS (4),       /* Addsub.  */
+      COSTS_N_INSNS (2),       /* Fpconst.  */
+      COSTS_N_INSNS (2),       /* Neg.  */
+      COSTS_N_INSNS (2),       /* Compare.  */
+      COSTS_N_INSNS (4),       /* Widen.  */
+      COSTS_N_INSNS (4),       /* Narrow.  */
+      COSTS_N_INSNS (4),       /* Toint.  */
+      COSTS_N_INSNS (4),       /* Fromint.  */
+      COSTS_N_INSNS (4)                /* Roundint.  */
+    }
+  },
+  /* Vector */
+  {
+    COSTS_N_INSNS (1)  /* Alu.  */
+  }
+};
+
 const struct cpu_cost_table cortexa15_extra_costs =
 {
   /* ALU */
@@ -1563,6 +1663,22 @@ const struct tune_params arm_cortex_a9_tune =
   false                                         /* Prefer Neon for 64-bits bitops.  */
 };
 
+const struct tune_params arm_cortex_a12_tune =
+{
+  arm_9e_rtx_costs,
+  &cortexa12_extra_costs,
+  NULL,
+  1,                                           /* Constant limit.  */
+  5,                                           /* Max cond insns.  */
+  ARM_PREFETCH_BENEFICIAL(4,32,32),
+  false,                                       /* Prefer constant pool.  */
+  arm_default_branch_cost,
+  true,                                                /* Prefer LDRD/STRD.  */
+  {true, true},                                        /* Prefer non short circuit.  */
+  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+  false                                         /* Prefer Neon for 64-bits bitops.  */
+};
+
 /* armv7m tuning.  On Cortex-M4 cores for example, MOVW/MOVT take a single
    cycle to execute each.  An LDR from the constant pool also takes two cycles
    to execute, but mildly increases pipelining opportunity (consecutive
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 389527c..46fc442 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -469,7 +469,7 @@
 
 (define_attr "generic_sched" "yes,no"
   (const (if_then_else
-          (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexa53,cortexm4,marvell_pj4")
+          (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa7,cortexa8,cortexa9,cortexa12,cortexa15,cortexa53,cortexm4,marvell_pj4")
               (eq_attr "tune_cortexr4" "yes"))
           (const_string "no")
           (const_string "yes"))))
@@ -477,7 +477,7 @@
 (define_attr "generic_vfp" "yes,no"
   (const (if_then_else
          (and (eq_attr "fpu" "vfp")
-              (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa7,cortexa8,cortexa9,cortexa53,cortexm4,marvell_pj4")
+              (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa7,cortexa8,cortexa9,cortexa12,cortexa53,cortexm4,marvell_pj4")
               (eq_attr "tune_cortexr4" "no"))
          (const_string "yes")
          (const_string "no"))))
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index ff89633..b39c4a9 100644 (file)
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -59,6 +59,7 @@
   " %{!mlittle-endian:%{march=armv7-a|mcpu=cortex-a5    \
    |mcpu=cortex-a7                                      \
    |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15       \
+   |mcpu=cortex-a12                                    \
    |mcpu=marvell-pj4                                   \
    |mcpu=cortex-a53                                    \
    |mcpu=generic-armv7-a                                \
@@ -72,6 +73,7 @@
   " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5        \
    |mcpu=cortex-a7                                      \
    |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15       \
+   |mcpu=cortex-a12                                    \
    |mcpu=cortex-a53                                    \
    |mcpu=marvell-pj4                                   \
    |mcpu=generic-armv7-a                                \
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index bda4c19..782a472 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12156,9 +12156,10 @@ assembly code.  Permissible names are: @samp{arm2}, @samp{arm250},
 @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
 @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
 @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
-@samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9}, 
-@samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-r4}, @samp{cortex-r4f},
-@samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m4}, @samp{cortex-m3},
+@samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9},
+@samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-r4},
+@samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m4},
+@samp{cortex-m3},
 @samp{cortex-m1},
 @samp{cortex-m0},
 @samp{cortex-m0plus},
Domain: System / Toolchain;